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Recent content by skywalkerluk

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    how to get a ideal comparator from analoglib in cadence

    I would like to know where to find ahdllib as well, or if anyone would be kind enough to provide it for us to download? It doesn't seem to exist in the list of libraries by default as analoglib does. Thank you. - - - Updated - - - I would like to know where to find ahdllib as well, or if...
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    A general Clocking circuit question

    Hi crutschow, Thanks for your reply! I am trying to build a latched comparator circuit with a pre-amplifier for a flash ADC (please refer to my attached labeled cadence schematic and simulated waveforms). I applied input signal as shown in the waveform plot (top two), at V_in+ and v_in-. The...
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    A general Clocking circuit question

    Hello everyone, I am trying to design a circuit and using a NMOS transistor as a clocked switch. The gate of the NMOS is connected to a periodic clock signal going from 0 to Vdd. This will make the drain current change periodically with the gate-to-source voltage (Vgs) and may affect other...
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    Design of differential amplifier (NMOS) using Current Mirror (NMOS)

    Hello eveyrone, I would like to design a differential amplifier with passive resistor load, using the current mirror or a single NMOS as my constant current source. The figure is attached. I know that the transistor below node A should be biased in saturation in a current mirror. However, the...

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