Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi all,
I am trying to know whether LEVEL 40 MOSFET model is inbuilt with any recent Cadence versions..?
This level is usually used for Thin film transistors. I am not able to find the information related to that in my cadence setup.
When I try to run a SPICE file with the information...
Re: spice level 1
I completely agree with the user jcpu.His/Her comment is so right when it comes to check the transistor for new LEVEL. Its just not a matter of changing the LEVEL number in the SPICE file as there is a pure technology called Device Modeling behind this single word LEVEL. So...
Re: Organic transistor RFID
Refer to the book named analog circuit design using organic field effect transistors by Nicholas ***.
Should be helpful I guess
Hi,
I have got a very basic doubt suddenly.Thought I should ask you people here so that I get cleared and also others in future if they are equally confused like how I am now
In a 10 bit SAR ADC, for example if the sampling frequency is 2 KHz, then the entire conversion cycle takes place...
The Rbias is used in order not to make the signal quantity flow through the biasing network so that the full signal gets appeared at the gate/base of the transistor.Usually the value of Rbias is high so that it provides a high impedance path to signals.
Hope it helps
Santom
Thanks for explaining.I really appreciate that but I kindly suggest...you could probably explain a bit more detailed if you find some free time as its quite hard for many to get the principle_of_operation from your description in my opinion.
Hi,
I developed a Class D power amplifier and it was made into an IC.I am trying to measure my IC.The output waveform should be a differential switching square wave whereas I am getting some weird waveform.Not only weird, those two weird waveforms from each output(Out+ and Out-) are not...
hi people,
I just would like to know what it means by "variable self timed loop"
Its in the context of SAR ADC.
Thanks so much in advance
regards
santom
As a design engineer, which of the parameters would you choose to increase the accuracy of the amplifier.Is it Open loop gain(Ao) or the transit frequency(fT).
please also state the reason possibly for your choice.
Regards
santom
Hi,
I have this kinda basic query as how they assume that the source resistance value to be zero for the ideal case of a voltage driven CE amplifying stage and the source resistance as infinity for a current driven amplifier.
Also I am getting confused as what to assume when..like...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
