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Recent content by sanjay11

  1. S

    Interview question about a FIFO depth

    interview question + fifo depth if it is asynchronous write and read .... the clocks may differ by phase and ppm (ppm) difference. Based on that fifo may be needed.
  2. S

    Explanation of the physical layer (PHY) in DDR2

    Re: DDR2 PHY Seach for DFI on google. It is DDR PHY standard developed by Denali.
  3. S

    2 Dimentional Input/Output Port in Verilog

    not in verilog, but think supported in system verilog using interfaces.
  4. S

    Basic and detailed information about LUT in FPGA

    Re: LUT https://en.wikipedia.org/wiki/Field-programmable_gate_array https://www.xilinx.com/support/documentation/white_papers/wp209.pdf **broken link removed**
  5. S

    Manual Place and route

    place and route it always helps if at least the design blocks are placed manually (near to their respective IO's). It reduces the burden on the tool to a large extent and achieve better timing. Not each and every signal and module needs to be manually handled. A top level manual placement of...
  6. S

    Synthesis Error : @E:Signal 011 error in m_xilinx.exe

    signal 011 error in m_xilinx.exe Synplify-pro 8.9 crashed with error, Synthesis Error : @E:Signal 011 error in m_xilinx.exe What could be the issue ?
  7. S

    Difference between ChipScope and Identify ?

    What is the difference between ChipScope and Identify ? Also which tool is better ?
  8. S

    SDR SDRAM controller code needed (Verilog/VHDL)

    sdram model hdl search on opencores.org
  9. S

    Book suggestions for learning Verilog

    Re: Verilog book The Complete Verilog Book (Hardcover)
  10. S

    Why this Verilog coding used in testbench is wrong?

    Re: About verilog coding @ (posedge clock);
  11. S

    FIFO depth calculation

    calcualting fifo depth 16 is not correct answer.
  12. S

    Is system verilog the future??

    system verilog is good but can't replace 'e' as it is more advanced, powerful. but it is free.
  13. S

    interview questions needed

    https://www.angelfire.com/in/rajesh52/quest.html
  14. S

    Which country has best opportunities (work and Pay) in VLSI

    vlsi country US/Japan/India
  15. S

    Basic question...confusing me....

    && is logical anding
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