Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by sanish

  1. S

    thinking more on current mirrors

    It also depends if your simulation is prelayout or post layout . The post layout netlists also model lateral stress and scattering effects causing further mismatch.
  2. S

    Spikes caused by charge injection when plotting current at the charge pump of PLL

    charge pump and PLL In my experience,only a few simulators like HSPICE allow you to view the component break up of the resulting drain current . With this you may view specifically the channel charge injection and clock feedthrough components of the current from the switches of the charge pump...

Part and Inventory Search

Back
Top