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Recent content by rourabpaul

  1. R

    vhdl 2 dimensional array range

    1 2 3 what will be happen if I write this type t_ChargeProperties_stream is array ( 0 to 7) of t_ChargeProperties; type t_ChargeProperties_stream_n is array ( 0 to 3) of t_ChargeProperties; type t_ChargeProperties_stream_7 is array ( 0 to 8, 0 to 7 ) of t_ChargeProperties_;
  2. R

    vhdl 2 dimensional array range

    I am using ise14.1 vhdl I have a record type t_ChargeProperties is record Charge : t_Charge; --10 Time : t_Time;--10 Row : t_Row;--6 Pad : t_Pad;--8 --Gain : t_Gain;--13 --Branch : t_Branch;--1 FLPad : std_logic;--1 end record; and types type t_ChargeProperties_stream is array...
  3. R

    VHDL Array Declaration in port

    I have googled with this topic but didnt get any ultimate solution. Can i declare a array as a port??
  4. R

    Blue state in testbench

    I found blue colour in my test bench. Im using ISE 10.1. wha does it mean??
  5. R

    Spartan 3e board board communication by Ethernet port

    Hello everyone, I am working in spartan3e with EDK11.1. I have succesfully sent data from board to pc via ethernet using emaclite.I noticed the packet in my pc by wireshark. Now i want to receive data from pc to board via ethernet?what function should i use?Can this similar approach be used...
  6. R

    difference between Opb,lmb,plb

    what is the difference between OPB, LMBPLB (busses) in soft core microblaze?
  7. R

    vhdl syntax '#' maens??

    Thank u so much
  8. R

    vhdl syntax '#' maens??

    what does in mean in VHDL constant MAX_EXP : INTEGER := 2#11111111#; i dont know what '#' means
  9. R

    ADC connection with Microblaze????

    m new in edk platform,(using spartan 3E) I have notice that there is two types of IP in xilinx edk 11.1 1. I.P.s like dip,push button,ethernet,urlite,sdram,flash memory ect. we are adding these ips during the bulding of BSB. 2. I.P.s like adc,dac,ps/2 etc. We can add these I.Ps after...
  10. R

    weak '1' in testbench output

    my testbench code is allright and giving the desired output but i found the all outputs as weak signal, my outputs are like these 2'h8,4'h0 etc, could anybody help me?? ---------- Post added at 11:06 ---------- Previous post was at 10:59 ---------- how fool i am.actually the 'h' stands for...
  11. R

    coe file generate from image in matlab

    a picture is added with this post which have 224x224 pixels can any one generate a coe file with 3 bits width from this picture??
  12. R

    problem in rs232 comunication

    i am sending some bytes by rs232 in sparta3e board in xilinx edk tool i have array A[1,2,3,4,5] and a another array initialized as B[0,0,0,0,0], say i write a1=A[2]; //(a1 is 8 bit integer ) B[a1]=B[a1]+1; so the B should be B[0,0,0,1,0] but i get B[0,0,0,0,0], but if i send...
  13. R

    In VHDL language what the underscore exactly mean in natural no.

    I have another syntax problem the code is " scancode <= sc_r(scancode'range);" here scan code is 8 bit,and sc_r is 10 bit thank you in advance
  14. R

    RS232 communication with PC(hyperlink)

    it xilinx EDK tool,i want to connect rs232 using system c code , actually there was miss spelling.its uarlite
  15. R

    RS232 communication with PC(hyperlink)

    i want connect DCE rs232 with hyperlink of pc in edk(11.1) platform. in that case in system c code which functions of urlite i have to use,

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