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Recent content by RemyMartin

  1. R

    FPGA Advantage with Xilinx tools

    Nod. Synplify is better than Precision and Leo**do spectrum
  2. R

    Comments on NIOS-core (Altera)

    Re: compile your Nios system with Synplify, Leonardo Spectru Setting the target device to flex10ke in SOPC builder??? What to do next? Set flex10ke in SOPC builder-->Generate it----->synthesisi in synplify while set the target device to ???----->compile it in quartusii and set target device to...
  3. R

    Can Nios be synthesized by synplify?

    If yes, how? Thanks a lot.
  4. R

    What's wrong with my LCD on the Nios Development Board?

    My Nios development board is the cyclone version. When I use the safe configuration, and the example routine: lcd_demo1.c, it runs properly, the LCD displays the messages. But when I use the "Nios_HW_Tutorial_Cyclone_1C20" to config my Cyclone, then the lcd_demo1.c under the...
  5. R

    How compute the gates of Cyclone or other FPGAs

    I use Altera's Cyclone: EP1C20, according to the datasheet of EP1C20, the total LEs is 20,060, but it does not clearly say how many gates it contains. My manager ask me this, but I dont know how to reply, 'cause I dont care how many gates a FPGA contains since the compution results are rather...
  6. R

    Altera Nios Discussion Board

    @ltera Nios Discussion Board S@ nice!
  7. R

    About the choice of FSM---Moore or Mealy

    What do you mean by saying that "Synchronize the inputs??"
  8. R

    About the choice of FSM---Moore or Mealy

    It is well known that FSM goes into twos sorts: Moore and Mealy, I have some question about them: 1: Can one of them substitute the other? 2: Which one is better? 3: Mealy FSM can be descripted by two process, one is sequential, the other is combinational. The following is a sample program...
  9. R

    NIOS 3.1 - how to install this core?

    Re: NIOS 3.1 Can Nios be used in ASIC?? As far as I know it can only be implemented in Altera FPGAs, maybe I am wrong.
  10. R

    The Nios® embedded processor v3.0

    to manitooo: Nios can even be put into Acex devices.
  11. R

    How to force FSM to use "gray" type?

    Agree with radix in that "do not use both edeges of the clock because it will pains the timing analysis."
  12. R

    What's wrong with my Qu@rtusII and Sopc Builder??

    The version of my Qu@rtusII is 3.0,and Sopc Builder's is 3.01,and the license of Qu@rtusII is ok. But a problem of Sopc Builder pains me. After a Qu@rtusII project is built, I do the follwing in order to use the Sopc Builder: Tools--->Sopc Builder(at this time, it is active). But the Qu@rtusII...
  13. R

    who ever did pwm chip with fpga

    I've done a little about PWM with FPGA,I've used counter and the result is satisfying.While I have no idea of the second choice which is provided by cyteng,
  14. R

    About the "Floorplan Editor"in Max+plus2

    I am just a beginer fo FPGA and I've got to know a little about Maxplus2,but I still dont konw how to use the "Floorplan Editor".My teacher told me that I should not use this tool if not necessary,but he did not give me further explanation.Can you give me some ideas about this tool?
  15. R

    Where to start learning about IC design ?

    What can a beginner do? How can I start my study of IC design.?I'am chinese student,major in electronic communication;however ,I love IC design more.I've done some part-time job which has sth related to FPGA,but I dont think it's enough,I want to learn more.But there is few good books of IC...

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