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Recent content by rd_dinesh

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    Problem in measurement of CGH40010F based Power amplifier

    When I provide DC bias to my circuit, the drain current (which can be seen in the display of my Power supply) is fluctuating a lot and reduces to zero some times in between. What can be the possible reasons for this kind of behavior and how can I provide stable DC supply to my circuit? Note...
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    [SOLVED] Practices to be followed while doing RF power amplifier measurement

    I designed an RF power amplifier using CGH40010F transistor on RT6006(0.8mm thickness substrate) I want to know the dos and don'ts during the amplifier measurement.
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    Mounting RF Power transistor on to microstrip board

    I designed a mask for rf power amplifier, the microstrip substrate(RT6006 0.8mm thickness) was etched, now I want to mount my transistor on to it. What are the techniques I can use to mount my CGH40010F power transistor(whose gate and drain are 1.7 mm above ground)?
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    Via size and spacing

    currents through various capacitors in two different modes of operation.
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    Via size and spacing

    for grounding the capacitors(i.e, routing between the layers)
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    Via size and spacing

    I'm designing a power amplifier on an RT6006 board, I want to place vias in my design, I want to know how we can decide the size and spacing between the vias.
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    how should I choose a substrate for Power Amplifier design?

    I want to design a power amplifier (at 1.8 GHz and 2.4GHz), i have an RT duriod 6006 substrate(er = 6.45 and Thickness = 2.54mm), Can i go with this or choose the RT 5880(er = 2.2 and thickness 20mil)? I saw the latter substrate being widely used for Power amplifier design.
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    Matching shift during Ideal transmission line(TLIN) to microstrip (MLIN) conversion in ADS

    My matching is getting shifted towards left when i converted my circuit from ideal transmission line to microstrip line. I tried optimizing but my matching didn't get restored. Any idea, how to resolve this issue?
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    class E power amplifier impedance matching

    Is the shunt capacitor you mentioned here, is the internal capacitance?
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    Minimum trace width to tolerate the given current

    Thank you. I'm new to the tool kit. Can you please elaborate on how to check on it. and Is there any feature in Keysight Advanced Design Systems(ADS) to calculate the same?
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    Minimum trace width to tolerate the given current

    I'm designing a power amplifier on ROGERS 6006 substrate(er = 6.45 and H(thickness) = 2.44 mm), how to decide the minimum trace width for DC bias line, to tolerate(200mA) and rf lines which should tolerate 2A of peak current?
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    ADS EM Simulator

    Can you post your substrate editor view?
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    Convergence error in ads

    Did you sweep the frequency in your schematic using parameter sweep?
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    Maximum input drive power(in dBm) for CGH40010F transistor

    Okay, you say that we can operate it well beyond P1dB, but what is the maximum input power(in dBm) for safe operation. I found a research paper using ~31dBm (which I calculated by subtracting gain from the output power, they reported) So I decided to move with 30dBm Any suggestions
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    Convergence error in ads

    Hi Go to the harmonic balance simulation controller in your schematic ---> increase the order --> simulate again

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