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Recent content by rayan123

  1. R

    Accessing a c variable in modelsim

    Hi Dave, Thanks for the reply. What i meant was, is it possible to add c variables from system verilog into questasim wave, so that i can see how that c variable is changing its value at different clock edges Regards, Rayan
  2. R

    Accessing a c variable in modelsim

    I am using modelsim to simulate a DPI files and want to access a variable from a c file. I am not sure if i can do that. I tried to find the command for this but could not. Is it possible, if so what is the command. Thanks in advance
  3. R

    Question regarding simulating the DPI in QuestaSim

    Hi fellas, I am new to this domain of DPI I am trying to use DPI function. I have some .v files, .c files, .h files and a .so file. I compiled .v and .c files using the command vlog -sv -dpiheader <filename_dpi.h> <filename.v> <filename_tb.v> <filename1.c> <filename2.c> I know that i have to...
  4. R

    Question regarding simulating system verilog DPI in Questasim

    Hi fellas, I am new to this domain of DPI I am trying to use DPI function. I have some .v files, .c files, .h files and a .so file. I compiled .v and .c files using the command vlog -sv -dpiheader <filename_dpi.h> <filename.v> <filename_tb.v> <filename1.c> <filename2.c> I know that i have to...
  5. R

    Clock gating in cadecne RC compiler

    Hi, I am new to cadence RC compiler. I am trying to insert clock gater and when i am synthesizing i give the command "set_attribute lp_insert_clock_gating true" but still the gaters are not formed. Am i missing some thing in the code or i should use some other commands for inserting clock...
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    Reason for sampling frequency being not multiple of signal frequency...

    I read that the sampling frequency should not be the integral multiple of signal frequency...i want to know the theory behind this..if there is any document explaining this will be great help...thanks in advance..
  7. R

    Calculating EDP(energy delay product) in cadence tool

    can someone post a doc or brief on how to find edp in cadence tool
  8. R

    Sizing nmos and pmos

    how do i size the width of nmos and pmos in xor for minimum delay...

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