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Hi Dave,
Thanks for the reply.
What i meant was, is it possible to add c variables from system verilog into questasim wave, so that i can see how that c variable is changing its value at different clock edges
Regards,
Rayan
I am using modelsim to simulate a DPI files and want to access a variable from a c file. I am not sure if i can do that. I tried to find the command for this but could not. Is it possible, if so what is the command.
Thanks in advance
Hi fellas,
I am new to this domain of DPI
I am trying to use DPI function. I have some .v files, .c files, .h files and a .so file.
I compiled .v and .c files using the command vlog -sv -dpiheader <filename_dpi.h> <filename.v> <filename_tb.v> <filename1.c> <filename2.c>
I know that i have to...
Hi fellas,
I am new to this domain of DPI
I am trying to use DPI function. I have some .v files, .c files, .h files and a .so file.
I compiled .v and .c files using the command vlog -sv -dpiheader <filename_dpi.h> <filename.v> <filename_tb.v> <filename1.c> <filename2.c>
I know that i have to...
Hi,
I am new to cadence RC compiler. I am trying to insert clock gater and when i am synthesizing i give the command "set_attribute lp_insert_clock_gating true" but still the gaters are not formed. Am i missing some thing in the code or i should use some other commands for inserting clock...
I read that the sampling frequency should not be the integral multiple of signal frequency...i want to know the theory behind this..if there is any document explaining this will be great help...thanks in advance..
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