Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by ramuk8avis

  1. R

    spwm inverter coding for pic 16f877a

    unsigned char sin_table[32]={0, 25, 50, 75, 99, 121, 143, 163, 181, 198, 212, 224, 234, 242, 247, 250, 250, 247, 242, 234, 224, 212, 198, 181, 163, 143, 121, 99, 75, 50, 25,0}; unsigned int TBL_POINTER_NEW, TBL_POINTER_OLD, TBL_POINTER_SHIFT, SET_FREQ; unsigned int TBL_temp; unsigned char...
  2. R

    [Moved] SPWM Proteus Inverter

    Please check this circuit and help me any modifications and i am getting pulses at the input side of ir2110 but not at oputput side iam attaching the code and circiut connections snapshot inproteus thanking you - - - Updated - - - please can anyone see the circuit and tell corrections
  3. R

    bootstrap capacitor design

    what is the value for Qg and Vmin in the bootstrap capacitor calculation for ir2110 according to the formula given in the forumula inAN 978 THANK YOU
See more

Part and Inventory Search

Back
Top