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Yeah you are correct. Increasing the Ro will move the pole to lower frequencies without changing the unity gain frequency. This is because the dc gain(low frequency gain) will increase proportionally. But the discussion is about increasing load capacitor. If the load capacitor is increased, the...
If the dominant pole moves to lower frequencies, the unity gain frequency also moves to lower frequencies proportionally. Effectively, the non dominant poles are more farther from the unity gain frequency. Hence phase degradation due to these non dominant poles will be less. Hence the better...
Junus2012,
I believe the compensation whatever you are talking usually corresponds to a single stage OTA. In that case, adding any extra capacitive load at the output will push the pole associated with it to lower frequencies. If this happens to be your dominant pole, then with increasing...
In the architecture that you have shown, there are effectively two loops. One through just a single diode and other through a larger diode in series with the resistor R3. One of the loops will be in positive feedback and other will be in negative feedback. To obtain overall negative feedback for...
Junus,
Let us assume that the open loop transfer function(i.e., the opamp input-output transfer function) is A(jw). In the figure, the dotted line shows this transfer function. Now, let us assume that we connect this opamp in a unity gain buffer configuration(non inverting). Now, the buffer is...
It is always -3 dB bandwidth that is specified whether it is unity gain or gain greater than one. However, it so happens in a unity gain buffer(non inverting configuration) that the unity gain frequency of the opamp transfer function(open loop transfer function) will be same as the -3 dB...
When the input is 0 mV, are all the transistors in saturation? Do you have a nMOS+pMOS input pair? I think the signs of the first stage written in the diagram are wrong.
With two parallel paths from input to output, effectively you are creating a zero. From phase margin point of view, you can at the maximum compensate for a pole. You cannot definitely use an "unstable broadband amplifier" in parallel with a "stable narrow band" as the effective OTA will still be...
When you have two parallel paths between the input and the output, the actual transfer function will be the sum of the two. Let us say in the first path, we have a narrow band OTA(usually mulitple stages for large DC gain) and the broadband OTA(single-stage usually)is in the second parallel...
Simulate the common mode feedback loop gain. This has to be done in the same way as you do it for the main differential loop. Unity loop gain frequency of this common mode feedback loop and the corresponding phase margin is what you should look for.
Yes noise can make your circuit unstable. As you must be knowing thermal noise is wideband. The high frequency noise components will excite your loop. If there is insufficient phase margin, then the loop will not behave properly. If the phase margin is negative, then your loop goes into positive...
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