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analog interview
hi,
these questiions are very basic and important for an analog mixed signal design engineer. You can refer razavi, baker, ken marting to get anwers to all these question apart from gaining some more knowledge about AMS.
rdgs
raags
cadence install pdk
you need to copy your PDK to library location first. And just follow cadence source link help to proceed further. But it is not a difficult process to be done.
rgds
raags
hi you can measure INL and DNL by simuating complete ADC for long duration. For defination and measurement methods you can check maxim website.
regards
raags
assura bad net
When you encounter a error as Bad initial net binding, there might be a wrong connection wrt input port, input may be shorted to other nets also.
First ensure your schematic is correct and check for the input nets in your layout.
you can read 'CMOS IC layout design by Dan Clien', its a good book for the begineers.
I hope there is no tool available to retrive schematic from layout.
Re: Clock Tree Synthesis
To understand CTS refer to the BOOK ASIC B[/url]y MJS Smith.
It is freely available in the net in EDACAfe
the link is
http://www.edacafe.com/books/ASIC/ASICs.php[/url]
Input Delay is the delay inherited by the signal coming at the input of a Gate. It depeds on the capacitance value at the gate pin. This can be characterised in Hspice.(More details refer to Hspice Manual).
Output Delay is the combination of delay of gate ( internal delay) + delay due to load...
Re: buffers
Normally not always buffers are inserted...First determine the critical or timing violated path in your design.Rearrange the combinatinal blocks near to the capturing flops or launching flops.try to reduce the distance between the launching and capturing flops.
Usually go for...
Re: Help regarding perl
If you are working in windows first make sure that you have a perl complier which cn be freely downloaded from net.
Go through the command reference document of Model Sim regarding the parameters required to invoke it from command mode.
For basic tutorial regarding perl...
If you want to access only 4 bits at a time then do masking operation by using BITWISE operators & (Bitwise AND) | (Bitwise OR) ....
for eg var=79
to use only 4 lower bits and the original no with " 0F " .
temp = var & "0F";
similarly for upper 4 bits use " F0 "
Recently Intel has announced that CMOS manufacturing capability can extend till 17nm beyond which it will be very difficult to manufacture the devices. The yield goes down with shrink in technology because of various issues that come into picture (UDSM issues) The next future embeds devices like...
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