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Recent content by qwertyIC

  1. Q

    I have two questions about boost converters, thanks.

    About boost converer, ask two quesiton,thanks 1. How much boost's max duty can reach generally? Can it exceed 90%? such as Vin=3V to Vout=30V.What it pay attention to? 2. Now I design a boost, typ duty is 32%(Vin=3.8,Vo=5.6), uttermost is 60%. Frequency is about 1.5M, or below(800K). My...
  2. Q

    Which ideal amplifier is faster - follower or inverting?

    Re: which is faster?about amplier. I think ideal means GAIN is very big.
  3. Q

    Which ideal amplifier is faster - follower or inverting?

    Assuming both is ideal amplier,which one is faster?
  4. Q

    "A New Small Signal Model for Current Mode control&quot

    a new small signal model for current mode control Hello, i have this paper. what's your email? I send it to by email.
  5. Q

    DC-DC pmos models, thank you.

    In my buck DC-DC project, Power PMOS is bought and adpoted,that s to say, only design controller. Add pmos model when Top simulation. Now a question come on. In top simulation, SW signal time of rising match with test result (base on tapeout samples), but time of falling more than test...
  6. Q

    a bias circuit - what's the advantage of this tpye?

    a bias circuit This is bias circuit. What's the advantage of this tpye? Thanks
  7. Q

    An error amp constructure.

    This is an error amp.What's the purpose of resistance at base? Is it should increase first stage' load resistance and so increase the gain? others? Thank you very much
  8. Q

    Articles, ieee papers and books related to buck converter

    buck converter My point is little, and I can't download many more paper.
  9. Q

    Articles, ieee papers and books related to buck converter

    buck converter en, good topic
  10. Q

    Paper: Feedback, Op Amps and Compensation

    Introduction There are many benefits which result from the use of feedback in electronic circuits, but the drawbacks are the increased complexity of the calculations and the opportunity for the resulting circuit to ring or oscillate. This paper employs graphical techniques to simplify stability...
  11. Q

    CMOS analog circuit design

    lectures in cmos analog circuit design CMOS analog circuit design Maybe is usefull for you!
  12. Q

    interesting,some question about input construction of AMP...

    This is the structure of AMP,its principle as follows: A voltage is 100mV(divided from VERF) when chip out hasn't current. PIN change more negative when current increase, and A decrease to zero voltage when over current coming. From now on, this amp begin to work to control the out. My question...
  13. Q

    a question about input construction of OTA

    Thanks, but others effect? Hi, Q1/Q2 increase the input impedance (Darlington configuration).
  14. Q

    a question about input construction of OTA

    This is input construction of OTA. PIN is negative (change as out current), Once A drop to zero, OTA begin to work. My question: why Q1/2 collector is connected to Q3/Q4 collector. consider what? Q1/Q2 act as lever shift. they can connet gnd directly, I think. Thanks for your relply!
  15. Q

    Pole and zeroes in alalog design

    In generally, pole is derived from the output stage of AMP, power output.

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