Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
I have seen gain boost amplifier which increases the output impedance by a factor of A of auxilliary amplifier.
i have seen all the implementations in differential output op-amp.
I am looking for the topology of single ended output gain boost folded cascode amplifier .
Can somebody suggest any...
Re: PLL stability
PM is fine. It has to be 45 degree for stability. But we should have3 negative phase margin for any feedback system. I am talking about open loop respons. AT DC we have two poles in third order PLL. One is from VCO which is 1/s and another is from chrge pump.
Dummy switch will have opposite polarity than the switch. You try to keep the falling edge of switch fast. Also dummy switch signal should have some delay compared to normal switch signal so that it can really cancell the charge.
bandgap simulation hspice
Ac analysis is the best method for PSRR
give ac source
vvpwr vpwr 0 VDC AC 1
use .ac statement
measure or view AC magnitude of output voltage.
It will give information of PSRR at different frequency
Re: Input referred noise
another way is to integrate the noise over frequecy region. This can be done by finding total noise.Then Divide that noise by Feedback (Resistance or capacitor).
You will get input referred noise.
Re: the differences between subthreshold and saturation are
In saturation you say that VDS > VGS-VT
In subthreshould, generally
VGS-VT <0
Transistor will be in saturation depending on first eqation. You should look for VDSAT which is no longer VGS-VT in subthreshold.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.