Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
verilog from schematic cadence
Hi all,
My complete system has both digital and analog blocks. I want to know is there any way to simulate the complete system where the analog block is designed completely till transistor level and the digital block is represented by Verilog or VHDL code...
Hello,
Can anyone point out a very good tutorial/book, where I can learn the basics of Harmonic balance and PSS simulations. And from there on a detailed description on calculation of intercept points with such simulation methods.
I would like to have the tutorial which gives more physical...
Do a S-parameter analysis in cadence and then use calculator, then in the calculator type,
imag(ZP(1 1))/real(ZP(1 1))
The setup should be one end is connected to the port and the other end is grounded.
Regards,
Prakash.
If anyone of you have the below mentioned paper, can you please send it across or post it.
Thanks in advance.
Hamilton and Hall, "Shunt mode harmonic generation using step recovery diodes"
Prakash.
Re: Urgently,about subthreshold circuit design in CMOS proce
I really doubt your comment on better power supply regulation in sub-threshold region. Since, power supply noise rejection mainly depends on the output impedence of the MOSFET, and the output impedence is independent of the operating...
I am not sure whether you can obtain 500 MHz with SA612 chip?
I thought the oscillation frequency is limited to 200 MHz if it is possible to obtain more than 200 MHz like say 437 Mhz. Please let me know. I also need such circuits.
Prakash.
The equation is correct, only thing is it gives the large signal analysis of the current flowing through each transistor.
i.e DC+AC components, as you can see when the "vin" is very small then the fourth order can be neglected w.r.t sciebtific approx and then to find the gain you do a...
Upconvertor mixer
Hi,
I am designing a upconvertor mixer. I want to know whwther IIP3 specification for a upconvertor mixer is important ?
If it is important how to determine what value is required for a upconvertor mixer and if possible please give me some links for a upconvertor mixer...
Re: Purpose of Resistor R
Do you mean at the source of M1 and M2, the purpose of such resistor is to linearize the current and voltage dependence.
Which in turn will make the gaina constant after a certain level of input voltage.
Prakash.
Re: JFET vs MOSFET
1) What is the difference between JFET and MOSFET in a very very basic sense... And when MOSFET has so many advantages, do we really have to use JFET..?
No, presently I have never seen anyone using JFET, it is mostly extinct.
2) We know that the clock source in most...
Hi,
I feel the gain of the circuit is can be divided into 2 stages,
1) From M6 to M5 which is,
gm6/(gm5+g06)
2)From M2 to outpu, which is a source follower in this case.
gm2/(gm2+1/RL+go2+go1)
Multiplying these two will give the effective gain.
the other transistor are for biasing.
Prakash.
Re: About FM TX
Hi,
the red box is a common base colpitt oscillator and hence the 1nF capacitor acts as a path to ground for signal frequencies (100MHz). But for the voice signal which modulates the carrier frequency it will be a high impedance as the frequency is around 4 KHz, (which is 25000...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
