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Recent content by psr

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    DDR4 length matching

    Hi all, Can anyone of you explain the below rule of length matching Length Matching between DQ and DQS within byte -10mm < DQ - DQS < 6mm I am much grateful for your help. Thanks, psr
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    Pads_router_Constraint

    Hi all, Is it possible to define Constraint area in PADS tool as we do in Allegro ? For example to define neck down trace width inside BGA area. And BUS route option is hidden in my PADS layout. How to make it enable? Please help in this. Thanks in advance. If anyone had got PADS router...
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    Pads_ascii_4.0_error

    Hello, From my PADS 9.5V pcb file, I am trying to export ascii 4.0 Version. Requirement from Client. I am getting the error as shown in the attached jpg file. ("Flooding priority was skipped in one or more copper pours because this property is not supported in the selected ASCII format") Has...
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    spec for High Speed Design Techniques

    Hi Marce, Thanks for the help. Can I get spec related to DDR routing?
  5. P

    spec for High Speed Design Techniques

    Thank you. Let me reach out to the site and check.
  6. P

    spec for High Speed Design Techniques

    Hello, Could anyone please let me know what are all the general techniques used in High speed board design. Any spec available to learn about that? I've worked in pcb designs but not high speed boards. I am just stepping forward to learn layout considerations for DDR, PCIe, HDMI ,etc. I would be...
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    component selection( loads)

    Hello Guys, I am new to Hardware testing. I need to select few loads with respect to the driver output rating. Can anyone Please help me in selecting the loads. Driver rating Imax- 1A overload- <5A Miimum rise and fall time 10 us. Load types can be - Capacitive, max 10µF, (e.g. LED matrix) -...
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    What's the reason for shorting AGND and DGND using Ferrite bead?

    Hi, In mixed signal boards, we are keeping analog and digital grounds separated. Whats the reason to short the two grounds at one point using Ferrite bead? Can anybody suggest any good study materials to understand characteristic impedance , EMI, EMC, DFM ,DFTconcepts in little bit simple way...
  9. P

    "General Layout Design Guidelines " needed

    Layout Guidelines Hello everybody, If anybody is having "General Layout Design Guidelines", could you please share here? Thanks in advance.
  10. P

    Need an easy way to make a logo in PADS software

    Re: LOGO creation in pads Hi, Thanks for your help. I'll try and get back if I get any question. Regards, psr
  11. P

    Need an easy way to make a logo in PADS software

    LOGO creation in pads Hi, Can you suggest me any easy way to make a logo in PADS software? It should come as 2D lines, right? First time, going to createa customer logo to place it in my board. Kindly help. Thanks, Psr
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    Advantage of choosing full thermal instead of thermal relief

    Hi all, Greetings. Is there any advantage in choosing full thermal instead of using thermal relief. Only for fine pitch components, we prefer full thermal. Why this is so? Thanks, Psr
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    What's the difference between Ibis and Spice model?

    Dear all, Whats the difference between ibis and spice model? and what is eye diagram? Why its difficult to get the ibis model from the vendors? Regards, psr
  14. P

    The best techniques for auto routing

    Hi all, I just want to know if auto router (especially Allegro )is used by many? Is that gives the expected routing results? Those who opt for auto routing,are you using any techniques/procedures to get the best output.Please share your thoughts and knowledge here. Thanks & Regards, Psr
  15. P

    Assigning new IBIS model in allegro 15.7

    Hi, What type of error you are getting? And what type of device is this? Regards, Psr

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