Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hello everyone,
I have been assigned to design a 6T SRAM (high speed, a few GHz). I've never done this before and I'm now looking for books that could help me in order to know better about the subject. As my budget is low, I don't want to buy a book that doesn't contain enough information or is...
Thank you very much for your help. I'll look for reverse-bias breakdown on google to learn more.
There is just something I don't understand, if source and body are connected at the same potential, why would they be in reverse-bias breakdown as they are connected to each other?
I'm not really...
Hello,
I would like to know what happens to a NMOS transistor when Vgs < 0. My problem is that in one of my schematic Vgs = -1.3 V. Will it break?
I tried to find the answer on the internet but nothing about Vgs < 0 for a NMOS (or Vgs > 0 for a PMOS)
On the forum, people talked about Tsividis...
Okay I'll try to help you from the beginning. It might not be the problem but my delays are a little higher than yours.
For reset sequence : Your code will be in quotation
Assuming delay(29) is 480 us, (you need to make sure of that with an oscilloscope for example). For the second delay...
Hello, this thread is not about programming so I'm sorry to post it here, but I think this section suits the most to my question.
My question is the following, what is the amplitude of a clock signal for a microcontroller?
I know that it's a square signal with a fixed frequency, but what is the...
Hello,
I'm having some trouble understanding this schematic : **broken link removed**
It's a curcuit from the article named : High-Performance Crystal Oscillator Circuits : Theory and Application, written by ERIC A. VITTOZ, MARC G.R. DEGRAUWE and SERGE BITZ. From the forum rules, I understood...
Hello,
I tried to search how to do it on the forum but every open-loop gain calculation I found were related to amplifier only.
So here is my question, I designed an oscillator (pierce oscillator with quartz) with CMOS transistor. I would like to measure the open-loop gain and phase at the set...
The simulation was actually badly configured. I used a harmonic balance and I could see the oscillations.
Why is the phase and magnitude wrong? am I not supposed to have a phase of -180° at least? I'm a little beyond that.
About the gain, am I not supposed to have a gain superior than 1 to...
I'm doing the exact same thing right now, and for the noise I use the hbnoise simulation, you can find a tutorial here : (Be sure to use IC615 ISR14 or later to see the new MMSIM12.1 features in the GUI)...
okay that's what I thought, then he must have a command to get the address from a slave right?
Connect only one slave, get that address, write it down, connect the other slave and do the same.
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.