Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi,
Can somebody help me to setup SpectrumMeas function in Viva calucator of IC6.1.4 (of cadence) for my sigma delta adc of first order?. My input frequency is 20 Hz and sampling frequency is 1 KHz.
Hai,
I have some designs in UMC180 nm technology in cadence. Also I have technology library files for UMC180 nm technology. I wanted to set up UMC180 technology library for mentor graphics and I also want to import my designs to mentor. I request humbly to help me.
Thanks n advance
Nishanth
I designed one 4th order switched capacitor biquad filter in UMC 180 nm technology using cadence software (version 5.10.41).This circuit is operating on a two phase non overlapping clock generator (i/p frequency = 1 kHz). To simulate this circuit I used, PSS and PAC analyses in Spectre RF...
How to choose load capacitance to prepare test bench for the simulation of 1.8 v saturation design opamp (miller type 2 stage)? If some procedure is there somebody can tell it to me (Even if not the exact value, but the range at least)? How to choose load capacitance such that it won't affect...
How to distinguish the positive and negative plates of a MIM capacitor in layout as well as in schematic ? using a lengthy or small metal 6 layer which is preferred for connecting? I found that it is good to put metal layer contacts outside the capacitor. Is this right? I am here adding one...
what we need to consider as a rule of thumb while fingering?. What i only know is gate resistance of the finger should be less than inverse transconductance associated with the finger. Is this rule enough? If somebody explains it with an example, i will be happy.
Thanks in advance,
Nishanth
I am using umc 180 nm technology. sheet resistance of poly is 8 ohms/square.(it is written so in the technology file). for a 1u length and 1u width mos transistor (fingures=1), what is the gate resistance?(I don't know what is meant by /square)
Thanks in advance,
Nishanth
These are some screen shots of my RCX window.
https://obrazki.elektroda.pl/78_1340272161.png
https://obrazki.elektroda.pl/66_1340272161.png
https://obrazki.elektroda.pl/25_1340272161.png
Hai,
I have a problem with virtuoso cadence layout editor. I used to generate layout from schematic in the following way. From virtuoso schematic editor Tools - Design synthesis - Layout XL - open a new layout view. Then from virtuoso layout editor Design - Generate from source. So the...
Hai,
I want to make the layout of a delay element. So first i made the layout of an inverter. And i used the symbol in the schematic of delay element and from that i generated the layout. Next i want to do some optimization using hierarchy. For example i wanted to make the nwell common for...
Hai,
I want to calculate the following two quantities for my preamplifier with cadence tool. Can anybody give me the procedure?
1. Total input referred noise voltage Power Spectral Density @1Hz & @100Hz.
2. Total input referred r.m.s noise voltage (1 Hz - 100 Hz)
Suggest me...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
