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Recent content by Nig

  1. N

    What should I specify for the reference node in PSS?

    Yes. It is perfectly ok. LC VCOs are differential and it is ok to give the reference node as the negative output node. Results will not be different.
  2. N

    Is it possible to judge the improvement in the phase noise based on the pss sim?

    Please check the noise contributors and check which noise contribution has decreased that caused the change in phase noise. Then, run a PXF or PAC for that port and check the transfer function from that port got changed. This can quantify how your new architecture gave an improvement. All the best!
  3. N

    Output buffers for VCOs

    An easy way to test the VCO is to use some inverter stages(ideally two) followed by CML which can drive a 50ohm. Phase noise meters will have a 50 ohm input port to measure phase noise. Note that the first inverter is going to add noise and it preferable to use it in the same LDO as used for VCO...
  4. N

    How to reduce the MOS OFF capacitance?

    This is a classical problem in VCO design. I will try to summarize the options assuming you have a NMOS switches in the cap bank. 1 - Check whether the NMOS switch can be turned ON with a higher voltage. This decreases the RON and to achieve a given ON switch resistance you can get a smaller...
  5. N

    verilog-a case statement in analog block

    Hi, You can add the following statements before analog begin and check initial begin integrand =V(bj) sIntegral = 0.5 end Also please try the following code, Make integrand as electrical and add the following statement V(integrand) <+ (sIntegral > 0)? V(bj) : 0; sIntegral =...
  6. N

    What's the OD layer that I see on layout?

    OD means diffusion layer in Layout. If OD layer is in Nwell then it becomes a PMOS device and if the OD layer is in Pwell then it becomes a NMOS device (it may be different based on PDK). Essentially OD defines the place where you can drop a contact to the well on which it is placed. For example...
  7. N

    Is it possible to hand calculate the phase noise of a VCO?

    It is a very tedious process and error prone (you can use ISF method by Hajimiri but i am afraid that it is not easy). Phase noise depends on multiple transistors and their operating point during that instant ( in case of phase noise it is around zero/CM crossing of the output). Phase noise...
  8. N

    Any good tutorial on spectre RF?

    I personally to find this to be a good tutorial apart from the spectre RF user guide https://www2.ece.ohio-state.edu/~bibyk/ece822/SpectreRF_0728.pdf
  9. N

    Suspecting a pss/pnoise issue in a VCO

    Make sure that the following are set correctly 1 - Do you have any filter in the circuit ( may be in LDO/supply ) that can take time to settle. Circuits with huge filter can be sensitive to tstab and results in huge change in pnoise 2 - If you are using spectre for running simulations...
  10. N

    OTA design simulation in LTspice

    Hello, You need to run DC simulations to find the operating point of various devices ( like to check whether they are in saturation or not). AC simulation (Freq sweep from 10 - UGB*10) can be used to find the transconductance, DC-gain and Gain Bandwidth product. Connecting a load cap ( 1pF in...

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