Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Re: DFT explanation
What is difference between, Test_mode (TM) pin and Scan_Enable pin?
Test_mode pin is use to put SOC/ASIC into TEST MODE or Functional mode. There are various test modes in DFT like ICTECT, IDDQ, IO BIST , AC/DC TEST, MBIST, JTAG etc. Scan_enable is only significant in the...
Hi
I am doing top level MBIST pattern generation and simulation for a modlue . While pattern simulation i am gettin Read margine violation for the RAM but my simulation is passing. I think it might be due to the clock frequency going in to the RAM.
I want to know what is the effect of this...
dftvisualizer
hi i had currently started working on the Mentors Fastscan and its supporting tool.
can anyone tell how to trace the cause of UO(unobservable fault).
should i forwrd trace it or backtrace it????????????
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.