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hi ,
i want to simulate pnoise of oscillator using spectre , there is an option sweep type(relative, absolute,default) with relative hamonic.
can anyone give me idea which and why i should use a particular sweep type and what should be the number of relative harmonics.
thanks in advance
mash 1-1-1 simulink model
hi,
can any one post the matlabcode or simulink used to calculated psd for sigma delta modulator( fractional n frequency synthesizer)
hi ,
i used simulink for system level simulation .fractional n frequency synthesizer is readily available in communication blockset
u can get better models in mathworks main wedsite.
power spectral density simulink
hi can any one give me idea how to simulate power spectral density of the sigma delta modultaor(digital) output using simulink
i want to observer the high pass nature of quantization noise at the sigma delta output
( i am using MASH 1-1-1)and i want to check...
hi ,
i need help regaring how to simulate quatization noise spectrum of sigma delta modulator(digital one) in fracional n frequency synthesizer in spectre .
thanks in advance.
hi shaq ,
for simple cmos inverter vdd<vtn+vtp will make short circut current zero since either pmos or nmos will be on.but i doubt whether the circuit will work if there is stacking of nmos or pmos(as in tspc) with this condition
this ppt will help u .this is by rabaey he gave an explanation for sizing a chain of inverters for optimizing performance.if sizing a chain of inverters didn't work use super buffers
phase lock loop pll gardner roland best
Phase-Locking in High-Performance System by Razavi
Phase-Locked Loops: Design, Simulation, and Applications by r e best
h**p://
phased lock loop for wireless communication
razavis book is collection of ieee papers. i feel book by r e best is the...
introducing higher RC feedback will provide dc feedback and for ac its openloop
refer allen section 6.6 page 311 figure 6.6-2
substitue higher RC value u can observe only the openloop freq reponse of opamp
Re: fractional n pll
hi,
rfdesign i feel u r right to certain extent,but what about fsk modulation using sigma delta fractional n freq synthesizer here we can apply the concept of oversampling.
as u said it may not be applicable when we r feeding a constant dc signal
thank u
folded cascode
advantages
high gain, no need for compensation, good psrr
disadv
need CMFB circuit, bais ckt, high o/p impedance,o/p swing is low, common mode range either on poitive or negative side will be limited u haveto go for fully complementary to have good cmr
two stage
advantages...
pll delta sigma modulator
we r implementing freq modulation and demodulation using pll so i feel we can implement spread spectrum like freq hop spread spectrum
we can vary divider ratio by using PN generator and sigma delta modulator
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