Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by Munna107

  1. M

    Shielding bias nets

    Hi, Normally we will do shielding for nets with ground. But particularly we will do shielding for PBIAS with VDD/VDDH and NBIAS with VSS, infact in the design we will add cap on PBIAS net intentionally with VDD. What are the advantages by doing like that.?
  2. M

    [Moved]: NMOS capacitor formation

    Mostly I have seen nmos cap in the nwell, why like this? Why won't we use pmos cap?
  3. M

    Why do we need voltage to current converter in VCO--PLL

    Hi, We are getting the current from Charge pump and then we converted it into voltage and the again into current. What is the use of this procedure. Are there any advantages.

Part and Inventory Search

Back
Top