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Recent content by mona123

  1. M

    cmos dimension for operating voltage

    Hi, If I use larger channel length device (say 1um) in a 90nm CMOS process, will my maxing safe operating voltage at drain and gate, scale linearly or will it be still be 1V given by foundry for 90nm gate length CMOS? Thanks.
  2. M

    difference between detectors

    Thanks Klaus. I was asking in general for a wireless transmitter or a receiver. Is there any reference for power detection through vxi? Why someone will use it and Why voltage rms detection won't be sufficient for power detection? Thanks.
  3. M

    difference between detectors

    what is the difference between voltage peak detector, voltage rms detector and power detector? Any reference? Thanks.
  4. M

    why opamp input track

    Perfect Answer!!! Thanks LvW
  5. M

    why opamp input track

    thanks sunny , can you explain a little better? what do you mean by linear gain? - - - Updated - - - thanks crutschow, so are you saying input difference is low due to negative feedback and is not dependent on open loop opamp gain? that's where I am confused. so if I make a single stage or two...
  6. M

    why opamp input track

    I am still not clear what is the physical mechanism that makes opamp inputs track each other? we say it is because opamp has high gain. can someone explain better. how high a gain is needed? thanks.
  7. M

    minimum current and size for transistor

    Thanks that helps but would it matter if it's BJT versus FET in that case there is no charging of gate capacitance is required, so we can go infinitesimally lower in current?
  8. M

    minimum current and size for transistor

    Thanks. So what would be the smallest current to start. pA, nA or fA, where is the lowest floor and why is what I want to understand mainly. Thanks.
  9. M

    minimum current and size for transistor

    I just pulled it from air since you asked, if you can give some example that will be enough for me, i just want to know the procedure of doing it as I asked in the previous message. Thanks.
  10. M

    minimum current and size for transistor

    It's not given. I need to compare a bias voltage against fixed threshold and then clamp it to the threshold voltage. Let's say 100ps. Is there an example from scratch? Curious what is the calculation to determine the required current from response time and what device size will i choose? Thanks.
  11. M

    minimum current and size for transistor

    I want to make an analog control circuit like a DC comparator with BJT or CMOS, using a differential type of structure. How do I know how much current do I need to to use for biasing and what basis should I choose my device size? Can someone help or point me to any book or example how it is...
  12. M

    cmos as simple switch

    Thanks for the discussion. I'll try to think more.
  13. M

    cmos as simple switch

    Hi nitishn5, Thanks for explaining. I am still wondering, what can go wrong from you statement "And if Node_h cannot handle it, it will be screwed". I have similar scenario. Can you please explain. Thanks for patience.
  14. M

    cmos as simple switch

    Thanks nitishn. Is it possible to explain a little bit more. I think that's the information I am looking for.
  15. M

    cmos as simple switch

    Thanks. If I can handle larger resistance, any advantage of going larger gate length?
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