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Recent content by mo.khairy.mo

  1. M

    max fanout for input ports

    Hi All, Kindly can anyone explain to me why we need to limit the max fanout of all inputs to be 1 e.g. "set_max_fanout 1 [all_inputs]" my understanding is that the max fanout should be constraind output pins only so why we constraint the max fanout of primary input ports? Thanks in advance
  2. M

    delay function in psoc using assembly

    how can i write a generic delay function using assembly on psoc 1?
  3. M

    differences of sync signals between VGA vs. DVI

    Hi all, i want to generate the sync signals (Vsync & Hsync) to a CHRONTEL dvi transmitter device CH7301C via vhdl i can generate it to interface VGA is there is a difference between Hsync & Vsync at VGA vs. DVI? thanks in advance
  4. M

    how to interface CH7301C DVI Transmitter Device via vhdl

    i'm using xilinx sp605 board and i ise11.4
  5. M

    how to interface CH7301C DVI Transmitter Device via vhdl

    Hi all, i need to write a vhdl code to generate the input interface signals for CH7301C DVI Transmitter Device how can i do this ?! thanks in advance
  6. M

    How to create PCI-Ex footprint on PADS9.0

    There is a group called PADS ASCII STD BD Outlines that you should be able to import. The files are in PADS V5 format and will need to be translated up to V9.0 File > Import > ASCII Also, there are these PCIe Cards for both the short and long versions - PCIeV36 PCIeV64 PCIeV98 PCIeV164
  7. M

    How to create PCI-Ex footprint on PADS9.0

    i've it in eagle 5.4.0 and i want to use it in pads layout do u have any idea about how to do this? thanks in advance
  8. M

    If anybody need help in EAGLE, ask me in this POST !

    Hi how can i export the PCI-E-164 connector from con-pc library to pads layout ?! thanks in advance
  9. M

    How to create PCI-Ex footprint on PADS9.0

    Hi all , i need to create a pcb footprint for PCI-Ex on PADS9.0 can anyone help me to create it since it's my first time to use PADS thanks in advance
  10. M

    What is the function of pads9.0 pin group?

    pads9.0 pin group Hi all, it's my first time to work on pads9.0. - what's the function of pin group and what's the difference between Gate-A pin vs signal pin vs unused pin? - if i choose Gate-A pin group what's the difference between all of it's types? thanks in advance
  11. M

    mentor graphics ee2007.8 tutorial

    HI all can anyone support me with expedtion ee2007.8 tutorials plz?! thanks in advance
  12. M

    How to implement core from xilinx core generator?

    xilinx core generator i try to implement the vhdl file but i've this error "The design is empty. No processing will be done" could u please provide me with some tutorials?!
  13. M

    How to implement core from xilinx core generator?

    xilinx core generator Hi all i use xilinx core generator to generate floating point adder now i generate the core but i don't know how to implement it. can anyone help me . thanks in advance
  14. M

    ModelSim XE error: identifier "x_dsp58a1" does not identify a component declaration

    what's this error?! Thanks all, i found a solution for this error i have to use the latest version of the ModelSim since that the Spartan-6 FPGA released 2009
  15. M

    how to use DSP48A1 in spartan-6 FPGA?

    Hi Farhada i read this guide but it seems that it's talk about the functionality of the DSP slice . i need to know how to use it in adder/subtractor,and multiplication using VHDL could you plz support me with some VHDL tutorials & examples?! thanks in advance

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