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Recent content by mirrobbs

  1. M

    PSS and PAC simulation setting

    Hi there. I'm designing a chopper amplifier. And I want to use PSS and PAC to acquire the voltage gain of the chopper amplifier. I have obtained some prelimilary results. But I want to know more specifically about to how to set the 'harmonic' option in the PSS and 'sideband' option in PAC...
  2. M

    How to simulate the input-referred noise of a chopper amplifier

    Hi, everyone. Can you tell me how to simulate the input referred noise of chopper amplifier in cadence? use noise, pss or pnoise? which is more suitable in this case? thanks in advance, best regards, Mirro
  3. M

    What are the CMRR impacts on negative-connect unit gain buffer

    Thanks, Kenambo. I can understand the 1st point you put forward intuitively that 'In unity buffer configuration, if CMRR is small then the difference between the input and output gets increase. ' And as for the two-channel implementation, you can assume the inputs are Vinp and Vinn of some...
  4. M

    How to improve the open loop gain for a single-ended op amp

    Thanks for your reply. Considering 'Channel length modulation', does it mean that the length is wider, the better matching in current mirroring can be always obtained? regard, Mirro
  5. M

    How to improve the open loop gain for a single-ended op amp

    Hi there, can you explain more in details about the sentence I quote from your reply? I'm very interested. Thanks in adv. regard Mirro
  6. M

    What are the CMRR impacts on negative-connect unit gain buffer

    Yes, exactly. My question is will the CMRR of opamp affect performance of buffer? And if two channels are implemented, how can we evaluate the CMRR regarding the differential signal between them? Below shows the schematic； Thanks in adv. Regard Mirro
  7. M

    What are the CMRR impacts on negative-connect unit gain buffer

    Hello. Can anyone give a explanation about the CMRR impacts on negative-connect unit-gain buffer (using single-end opamp)? Thanks in advance. regards, Mirro
  8. M

    some new trend topic in low power vlsi

    You can also refer to book of Jan Rabaey: “Low Power Design Essentials”.
  9. M

    some new trend topic in low power vlsi

    Algorithm optimization, Low voltage, Multi-voltage, Pipelined/ Parallel Architecture, Low power logic cells, New devices(3D transistor)...
  10. M

    How to import new Spectre model into Candence Virtuoso?

    How to import new Spectre model into Cadence Virtuoso? Hi guys, I have .SCS files. And I do not know how to import them into cadence virtuoso. Is there anyone who has the experience? I want more details about it. Thanks a lot!
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