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Recent content by milan.km

  1. M

    how to implement the power of 2 of a floating number?

    Hi, I would really apreciate if sb help me to calculate the power of two of a floating point number with FPGA?
  2. M

    how can I find "n" in this equation?

    my field is digital electronic but this equation is related to dsp. no, it's a normal distribution and gamma distribution but I dont know how it is converted.
  3. M

    how can I find "n" in this equation?

    thanks,... if it's usefull, I can put the resources of this equation.
  4. M

    how to calculate "u" and "v" in the following equations?

    Hi I have to caculate "u" and "v" in these two equations using conjugate gradient. I have studied conjugate gradient, but solving "u" and "v" through these equations is still vogue to me. I would really appreciate if sb could give me some hints how o solve it. thanks so much
  5. M

    how can I find "n" in this equation?

    hi As you an see in this equation in line 2 ,"n" is emerged. I'm new ti this field and I want to find "n" but I have no idea how I should calculate it? If sb know the solution, please help me. thanks
  6. M

    how is bram accesses characterized?

    i didnt get my answer.
  7. M

    how is bram accesses characterized?

    hi. does BRAM read accesses are characterized by a latency of two clock cycles (one to latch the address, and a subsequent one to latch data on the output) ?
  8. M

    can clk multiplleing be done by DCM?

    but the minimum freq for real time image processing is 50 MHZ.and my design still has some problems
  9. M

    can clk multiplleing be done by DCM?

    thanks ,will u explain it more? i am new to the design and i would appreciate if u explain how did u get 26.2144 MHz? - - - Updated - - - do u think its possible at all even by other designs(i mean interpolation by factor of 4). the designd i draw was the only design cross to my mind. do u...
  10. M

    can clk multiplleing be done by DCM?

    i did the architecture of the design and i post it here https://www.edaboard.com/threads/346458/ i dont have limitation on device.do u thinck changing spartan 6 with some sort of virtex will help me?
  11. M

    can clk multiplleing be done by DCM?

    for my previous post:wink: i want to do interpolation for one image and and i want to give each input pixel 4 times with 4*clk and then buffer each line and read each line four times with 4*(4*clk)=16*clk to do the line interpolation. I post the design too in the previous post as u said...
  12. M

    why having error with concatenation?

    hi trickyDicky, i did this design.:-?
  13. M

    can clk multiplleing be done by DCM?

    i want to do it for sth simpler like video 256*256 and 25 f/s.as i said I am a beginner in vhdl design.then i want to do sth more complicated like large images.
  14. M

    can clk multiplleing be done by DCM?

    i want to process the video with 25 f/s .it means i have 40 ms for each img and each image is 256*256=65536. it means that if each pixel comes at 40ms/65536 is ok.its equal to 0.61 us. u mean that ok?
  15. M

    can clk multiplleing be done by DCM?

    i dont know this,i didnt define it yet. i want the input clk for importing each pixel to the design.i think 10 ns is ok.but i dont know how should I technically define it

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