Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Register Log in

Recent content by lvwx

  1. L

    The clock of DDR Memory Modules

    I want to control 3 DDR Memory Modules by FPGA ,but i wonder how can i deal with the clock of these Memory Modules.Connect them together to FPGA or connect them one by one to FPGA?And does them neeed any Match resistance?
  2. L

    the clock of Xilinx Vetex2 FPGA?

    I have 2 questions to ask for help : 1.Can Xilinx virtex2 FPGA accept 250MHz clock? 2.Can Xilinx virtex2 FPGA output 250MHz clock signal from IOBs?
  3. L

    unbuffered dimms DDR Module and Registered ones - difference

    Thanks! Thanks! / Warning #1 - No thanks at Elektroda! Read forum rules before posting! /
  4. L

    unbuffered dimms DDR Module and Registered ones - difference

    DDR Who can tell me what difference between unbuffered dimms DDR Module and Registered dimms DDR module?
See more

Part and Inventory Search

Back
Top