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Thanks, but pcb is already etched and assembled so only place where I can put resistors now is between mcu and rest of the bus. Although there is 74LS138 used to control output enable of 74LS374's so there should be always only one of them driving the bus. Maybe except switching? Can I use 74138...
Hi, I have bus with 2x 74LS374 outputs side and 8x 74LS374 inputs side attached to it. I want to connect mcu (avr) to this bus and add some protection for the case I select some 74LS374 with outputs attached to the bus and forget to switch mcu port to input mode. Resistors in series between mcu...
I did. I am using aprox. 10 octal latches to mux/demux bus. Buses ties them all together and generates lot of connections. I know so, when I put two parts close together and click rats nest icon, eagle reoptimizes rats nest lines but it doesn't help much here.
Hi, is possible to logically split pcb into separately routed modules, or to let display rats nest lines only between selected parts? I am trying to connect two parts, but rats nest lines for other parts are annoyingly criss-crossing area. Thanks.
microchip icsp
Hi, please can you tell me where can I find both physical (signal levels, timing, shape, tolerances, etc.) and logical ICSP specifications? Thx. in advance.
potyo2
Potyo2 should be ICD2 compatible, so I want to ask if there is any program for ICD2 to statically set outputs to given levels to allow me to check them with multimeter? Thx.
potyo2
Hi, I have build potyo2 rev1 (**broken link removed**) but it doesnt work.
One problem is that selftest says "MCLR Vdd: Low", all other tests are passed. Another problem is so I have only 2.30V ISP-VDD (1.20V on 1RA1), shouldnt this be 5V when target device is selected to 16f877a? Also...
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