Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by kotes

  1. K

    send pcb sample file with signal integrity proved.

    send pcb sample file can anybody send a pcb sample file with signal integrity proved. and what are the step to be take care while designing level from schematic to layout and gerber, manufacture instructions for better way of what we design(impedence maching) . sample required in cadstar pcb...
  2. K

    constraint management for pcb - 4layer

    can anybody tell about constraint manager for pcb of 4 layer - prepeg thickness,fr4,copper thickness.etc.,this is for get to impedance controll on the tracks(selected ones). i hope you will help in this matter.
  3. K

    signal integrity on a pcb in cadstar

    signal integrity for pcb can any body did a signal integrity on a pcb in cadstar with a proven field testing. can you send procedure and if possible send a pcb sample along with attributes, layer stack, imp. crosstalk,emi etc...

Part and Inventory Search

Back
Top