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hi,,
i have a diff way of answer for this.
assume u have opamp with 60db openloop gain.now you use this opamp in unity gain buffer mode and give 1v to positive pin of opamp..idealy you are suppose to get 1v at o/p..but u get 999m only..diff b/w inputs of opamp is 1mv(static volatage...
hi ..
i see one more problem in sizing of last stage nmosM8.
u see in normal open loop case..
I(M10)=I
I(M3)=I
I(M1)=I(M2)=I/2
I(M4)=I(M5)=I(becuase of 1:2 ratio b/w M2 & M4).
I(M7)=4.5I
but I(M8) nmos =2.25I.
I(M7) not equal to I(M8).
this is not balanced DC bias condition.this itself will...
hi..
first of all,why do u need 0.5vdd at the output of single stage satge opamp.normallysingle ended opamp in openloop test,if u connect both input together.output will be surely in known bias state..not VDD or VSS.
i hope u are designing this opamp for closed loop only..once you put opamp...
can u help
hi andy,
i have designed one POR circuit.comparator has reset threshold of 50mv.
many company's POR datasheet has reset threshold hysterisis around 40mv-60mv.
actually power suplly(VDD) is bound to have around 100mv to 150mv noise even after putting decoupling capacitors at VDD pin...
hi ..
what NXING is correct.
this is true only for fully differential in & differential out opamp.
this may not be 100% true for differential in & single end out opamp.
if you want more explanation you can read razavi book.
--
kamal.
Re: why var-R MOS oscillate at "accurate=1" in tra
hi..
try with this..
.option method=gear accurate=1
basically this option sets [max dv/dt] between the internal time points which simulator kernal uses on its own,internal time step,accurate integration mthod
you are suppose to get reliable...
hi
i have designed POR circuit which doesn't have external cap.
able to get good results for 20uA current consumption.
but i need a circuit which has to work for 2uA(without external cap).
i have seen few datasheets around ~ 2uA.in those datasheets architechture is...
hi
try with this.
two stage balnced OTA with pmos input pair
DIAGRAM attached.
this might solve ur probs..but how much power u can spend (to get lesser than 30ns)..
hi fom.
thanks for fast reply.
i use hspice and analog artist(ADE).
i have 5meg RF and inv gain of ~100v/v.
around 32khz i have only 269deg phase.still circuit oscilates.
can u plz suggest me the way to get 360 deg.
i read one texas doc. RF should be selected such that crystal's parallel...
---
hi fom,
i did AC analysis like u mentioned above.
but V1/V2 gives out openloop gain plot.(how to measue loopgain BETA*AOL directly).
to find out the phase response,i added PHASE(V1)+PHASE(V2).is that right?
please write me in details if my interpretation is wrong.
thanks in advance.
--
kamal.
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