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Compare to the common source power amplifier, the stacking K FETs power amplifier's current is increased by K? Is that right? (Assuming the loadline inpedance is fixed as RL)
I'm not sure, just according to the loadline. Assuming the DC point dosen't change. If Zout<Zopt, the swing of current could achieve Imax while the voltage COULDN'T achieve the Vmax. In the same time, the output power doesn't equal to (Vmax*Imax)/8, which should be (Vmax*Imax*Zout/Zopt)/8, then...
Yeah, I know the difference between conjugation matching and power matching. I mean, after getting the optimum impedance, should I design the output matching network with the conjugation of the optimum inpedance or just optimum impedance? The picture below comes from "RF and mm-Wave Power...
Got it. So if the loadpull gets the impedance assuming Z, then in order to get the largest output power, I should ensure the 50ohm transfers to Z*. Am I right?
I'd like to confirm a theory. It's about PA output matching, after getting PA's Zopt, should I translate from 50 ohm to Zopt or Zopt*(conjugation of Zopt). THANK YOU.
Yeah, the gain of PA decreases about 2dB, I think the swing is too large which can reach 0.5V~6V, it may cause the CS transistor achieve linear region or deep triode region, while the input match isn't perfect conjugate match, then the current's phase caused by drain voltage is different from...
Could you explain how does gain expansion affects the phase change please? I found that decreasing the gate voltage made the gain expansion improved and also AM-PM got better.
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