Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
Hi All,
In a directed testcase environment with no support for functional coverage embedded in the verification environment.what are the criteria that needs to be considered for sign off of functional verification of a chip.
The functional coverage is done manual in my case.having said that...
Hi All,
Most of the current environment present for verifying the micro controllers are directed ASM based one.Where the testing is done based on direct testcases features for each of the functionality.I would like to get rid of the ASM based environment using the system verilog & VMM.Use the...
Dear friends,
In an AMBA bus system PCI is a device attached on the bus.I read that few people are using single channel DMA as a part of the PCI component for master memory transaction.Why is this single Channel DMA is used as a part of the PCI.One end of the PCI is connected to the host bus...
arm boot sequence
Dear Friends,
Can any one help me out with the steps involved in Booting for ARM.I want to know if ARM is a part of the SOC design, for functional verification What is the boot sequence that is involved in the verification environment.As far as I remember the Image is copied...
Hi,
I need a help.In my testbench I am feeding the inputs to the dut through a file.This input to the dut from the file has to be restarted once there is certain condition.I had used $fscanf initially which only drives once but I cannot restart when certain condition occurs.I want to restart...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
