Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.
cmos25_level49.txt
Hello all,
I found the following transistor models on the web: **broken link removed**
Is it possible to use PSpice to simulate circuits with these models I believe they are BSIM and level49.
If it is possible, then how do I go about using them in PSpice?
iou
Can someone give me the underlying theory to create (i.e., size and bias) a delay cell (a total of 4 delay cells in the ring oscillator). I am using 0.18um technology and I don't know what an appropriate bias current is for the cell, I don't know how to set output swing. I want to design for an...
Hi all,
I'm a newbie to analog IC design, I would like to know if I have a .scs file which includes the BSIM models for n and p MOS, can I use this file in PSpice?
If so how do I go about doing so with using PSpice with the .scs file. I assume I can somehow use Orcad Schematic for design...
how do I calculate (or set) the current in the following cascode current mirror circuit?
Can someone explain the circuit and how to design and analyse it.
Secondly, I'd like to set i to 2.5mA, I know VDD is 1.8V but how to I size the transistors to achieve this using .18um technology?
Opps, I...
This site uses cookies to help personalise content, tailor your experience and to keep you logged in if you register.
By continuing to use this site, you are consenting to our use of cookies.
