Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by ikevin

  1. I

    Need help with "expecting ')', found '['" error in

    That's what I've been suspecting... since this is the first time I use multi-dimensional vector in Verilog (with Xilinx)
  2. I

    Need help with "expecting ')', found '['" error in

    When I pasted the code, I added bold and messed it up, but the comma is there in the code. The error still occurs though :(
  3. I

    Need help with "expecting ')', found '['" error in

    Hi, I have a 2-tap FIR filter module as shown below. However, Xilinx kept complaining The lines that have error are shown in BOLD EDITED: added comma.
  4. I

    Differential inputs & outputs in Verilog

    Thanks for helping TA37. Do you know if I can instantiate the buffers inside the top level module as the following? module differential_signals_test_top ( input CLOCK_IN_P, input CLOCK_IN_N, input [15:0] DATA_IN_P, input [15:0] DATA_IN_P, //output CLOCK_OUT_P, //output CLOCK_OUT_N, output [15:0]...
  5. I

    Differential inputs & outputs in Verilog

    Hi, I have a Virtex 5 board and I would like to interface a high-speed DAC and ADC to it. I have differential 16 bits data and 1 clock in + 1 clock out total. Can I do something like this for differential signals? // ADC part // check Postive and Negage parts of the clock always @...
  6. I

    Amazing! Invite Venus standing on PCB.

    Hi shantf, Are you from pcbwing.com, I plan to use the service to try out a 4x4 inches 2 layers pcb. How many days would I get it from the day I send out the gerbers? Thanks.
  7. I

    Altium Designer 8: how to serpentine to match diff. pairs?

    Hi, I'm trying to match pair to pair (diff pair) by doing serpentine. Is there a tutorial to show how to it? Can be it done automatically by the software? Thanks,
  8. I

    Altium Designer 8: Add netclass in PCB but cann't update sch

    Thanks guys, this kinda sucks since it doesnt have one place like a net class manager for both pcb/schm...
  9. I

    RF/DC Ground Consideration

    RF_GND and DC_GND must be connected at some point, otherwise they will have different references and that might burn your circuit. Usually you route your RF signals with reference to RF_GND plane then everything else you reference to some other ground plane, let's call it DC_GND. Finally...
  10. I

    Altium Designer 8: Add netclass in PCB but cann't update sch

    Re: Altium Designer 8: Add netclass in PCB but cann't update So netclasses can only be pushed from schematic to pcb? I don't see anywhere to add netclasses in schematic though :(
  11. I

    Altium Designer 8: Add netclass in PCB but cann't update sch

    Hello, I am new to Altium designer. I've been trying to add net classes in PCB, Design->Classes.. then Update the schematic but it kept giving the error "None of the 1 differences detected can be resolved by automatically generated ECOs" Then it shows me the different: "Extra net classes" I...

Part and Inventory Search

Back
Top