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Recent content by icx

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    Anyone can give me a datasheet about Charge-scaling DAC?

    Anyone can give me a datasheet about Charge-scaling DAC? I have searched but failed,please help me . Thanks.
  2. I

    About Opamp design of DAC

    Then how to determine the unity-gain bandwidth according to the DAC specification? THx.
  3. I

    About Opamp design of DAC

    How to determine the unity-gain bandwidth of the opamp using in 10bit C-2C DAC? And how much the slew rate should be? Thanks !
  4. I

    NMOS threshold voltage

    nmos threshold for a nmos transistor ,if source is connected to ground,which one has the largest threshold voltage? a.connect substrate to -0.3v b. connect substrate to 0v c. connect substrate to 0.3v d. connect substrate to 0.5v
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    quantization noise of ADC?

    adcquantization noise ADC quantization noise is about: a.0.1 lsb b.0.3 lsb c.0.5 lsb d.1 lsb
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    Test question about maximum voltage drop

    maximum voltage drop? one power line is about 1000um,and every 10um it connects one uniform resistor to ground.if power source is added on one terminal of this line, the maximum voltage drop is 100mv.if same power source is added on both terminals of this line,what is the maximum voltage...
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    what kind of switch is better?

    system power is 2.8v.if one signal is 1.4v,what kind of switch is better to transfer this signal? a.nmos b.pmos c.npn d.pnp
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    Question about driving capability of nmos and pmos

    About driving capability in one inverter,nmos size is wn/ln and pmos size is wp/lp. In order to design one 2 input nand gate with same driving capability as inverter,what is the size of nmos and pmos in nand gate? a.nmos=wn/ln,pmos=wp/lp b. nmos=2wn/ln,pmos=wp/lp c. nmos=wn/ln,pmos=2wp/lp d...
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    what's the ktc noise in room temperatature for a 4fFcapacito

    what's the ktc noise in room temperatature for a 4fFcapacitor? a.0.01mv b.0.1mv c.1mv d.10mv
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    A question about capacitance between gate and source

    A question about Cgs. when one nmos transistor is off,the capacitance between gate and substrate is co.if this transistor is on but non-saturated,what is the capacitance between gate and source? a.0 b.1/4*co c.1/2*co d.co e.2*co
  11. I

    A question about diffusion resistor.

    diffusion resistor There is one p+diffusion resister in nwell.How to connect nwell? a.floating b.vdd c.gnd d.1/2 vdd
  12. I

    sigma delta ADC modulator

    If you have strong analog ic design background ,and if you focus all your working time on it ,maybe you can finish it in two months.
  13. I

    about bandgap open-loop analysis

    where can i open the circuit> how to simulate? thanks.
  14. I

    how to simulate Id/W vs gm/Id?

    Have you ever used this method in hspice and spectre? I want to know how i can get Id vs id/gm in hspice and spectre. thanks.
  15. I

    Pipeline ADc Modeling in Simulink

    digital to analog simulink what's the MEX?

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