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Recent content by gautamraavi

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    importing gds to virtuoso LE

    Hey mike could you help me out with the .map file i get the following error while trying to import the gds file Product : Virtuoso(R) XStream In Program : @(#)$CDS: strmin version 6.1.4 03/30/2011 00:11 (sjfdl235) $ : sub-version IC6.1.4.500.12 Started at: 31-Jul-2012 14:22:01...
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    how to convert the layout into vhdl or verilog netlist or code?

    Thanks for the info.
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    how to convert the layout into vhdl or verilog netlist or code?

    Hi I am new to cadence virtuoso, trying to do some timing analysis on the SRAM. I have built the SRAM cell layout using the cadence virtuoso . I would like to know how can i convert the layout into VHDL or Verilog codes or the netlist? And also would like to know which best tool to do...
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    cadence virtuoso layout using standard cells error

    Hi i am very new to the cadence virtuoso layouts . I am trying to make a 6T SRAM layout . The schematic has two coupled inverters . I have recently added the Nangate 45nm layout in which it has already a inverter layout, so i am trying to use the create instance icon to place the layout of...
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    cadence virtuoso spectre problem

    I didnt understand what you have said , can you be more specific sir?
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    cadence virtuoso spectre problem

    I am trying for an ac dc boost converter. i am getting the following error in transient analaysis Analysis `tran' was terminated prematurely due to an error. finalTimeOP: writing operating point information to rawfile. modelParameter: writing model parameter values to rawfile. element: writing...
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    spectre capacitor problem

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    spectre capacitor problem

    sir i am using cadence virtuoso , on that i am using a spectre as a simulation tool .
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    spectre capacitor problem

    Thanks for replying I am basically working on spectre and i dont know what are you saying about pspice libraries? can you please elaborate for me I even dont have analog Lib in my cadence library . so i was using it from NCSU library.
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    spectre capacitor problem

    I am new to cadence. i am working on simple full wave rectifier, the output with and without the capacitor remains the same. I mean my capacitor is not working as it should have been . I have taken the symbol from the ncsu 1.6 beta library . Does any have a capacitor model? please post it here.
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