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Recent content by flysnows

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    power synthesis unsuccessful, can anyone konw why?

    power synthesis unsuccessful, can anyone tell me the possible problem?
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    how to measure the switch's turn-on time and turn-off time

    can anyone tell me how to measure the switch's turn-on time and turn-off time using hspice simulation? thanks
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    need dissertation of analog-to-digital converter

    cmu-ece-1998-031.pdf anyone have the follow paper,plz? P.J.Lim, performance limits of circuits for analog-to-digital conversion, Ph.D dissertation, standford university, 1991.
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    need paper on averaging

    need paper on averaging,please. P. Figueiredo and J. Vital, “Averaging technique in flash analog-to-digital converters,” IEEE Trans. on Circuits and Systems I, vol. 51, pp. 233-253, Feb. 2004.
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    Problems of using the "dft" function of caculator

    Re: Problems of using the "dft" function of cacula I have meet the same problem. why select "start time=2u, end time is 2.1u, number of sample is 16384"? thanks
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    how to simulate on-resistance of Switch in cadence

    can anyone tell me how to simulate on-resistance of Switch in cadence? and how to describe it in hspice input file?
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    Simulate switches for S/H?

    the "R=V/I" is referred to the drain-source voltage devided by the drain current, and do it in DC sweep simulation? thanks.
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    Why is the resistance of Poly much higher than that of diffusion?

    Re: Resistance values my question is: silicide is usually used to increase the sheet resistance , why in UXC 0.13um process the sheet resistance of non-silicide poly is higher than that of silicide poly?
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    Question about silicide and non-silicide sheet resistance

    silicide is used to increase the resistance, but i find that in my 0.18um model file the non-silicide sheet resistance is higher than silicde sheet resistance, can anyone tell me why? is it wrong in the model file?
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    peak-to-peak value of output in buffer circuit decrease,why?

    in simulating of buffer circuit, i found that the peak-to-peak value of the output is lower than that of the input, can anyone tell me the reason, and this will affect the performance of the buffer? thanks.
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    How to do the distortion simulation for S/H circuit?

    I want to analyze the distortion performance of S/H circuit, my hspice netlist statement is : .fft v(out) can anyone tell me is this statement right or wrong? other parameter such as FMIN, FMAX should be definded in the .fft statement? thanks.
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    Phase margin problem as circuit is unstable at 100MHz

    Re: Phase margin problem I have meet the same problem. my question is: 1. usually the phase is 0 at low frequency, but why is it 180 at low frequency? 2. why "assume that the gain plot crosses the 0 dB line at 20 Mhz. Now the system will be unstable. "? the phase-margin is defined as...
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    help:how to use the res model of tsmc_0.35um library?

    in tsmc 0.35um library, the model of resistor is defined in the form of subcircuit, can anayone tell me how to use it in cadence simulator?
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    thesis:A Superconducting Bandpass Delta-Sigma Modulator

    bandpass delta sigma Thesis: A Superconducting Bandpass Delta-Sigma Modulator for Direct Analog-to-Digital Conversion of Microwave Radio by John Francis Bulzacchelli Massachusetts Institute of Technology,2003 This thesis examines the potential of superconducting technology for realizing RF...
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    thesis about positive amplifier

    Thesis: Amplifier performance enhancement methods using positive feedback techniques by Mezyad M.Anourah Iowa State University, 2002 In this thesis, three new methods of implementing th internal positive-feedback to build very high dc-gain amplifiers with very low gain sensitivity to...

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