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I meet one ViVADO error,
ERROR:[Drc 23-20] Rule violation (PDRC-133) SLICE_PairEqSame_B6B5_ERROR- Incompatible programming for SLICE_X283Y355. B6LUT and B5LUT must have a compatible equation,lower bits must be programmed the same.
It is so strange for me?
Anyone find the solution about it?:?:
but if the input is so big. the required memory is extra big. and which will reduce the compiler & simulation speed. you have to care about it for a verification methodology.
simly exam:
high-Z is between '1" and "0",
the gate only take the "1" or "0" as valid input,
so it don't know what to do, so the output is ,"unknown", x statement.
Low power Design
I think that if the architecture is more important for the ALU design. If u can not focus on the speed, that wud have some pretty architecture. and The Full-custom design flow is better for u! Such as Prime time , powermill and pathmill can be used.
good luck !
For The function coverage, the architecture prototype must be buit. It is rather difficuit. Maybe we have to get answers from tools such as openvera, Systemverilog?
In the hspice the power consumption is Effective consumption or
Average consumption ?
i am puzzle about the Effective consumption and Average consumption in the power analyze.
Who can say something about the actual meaning?
3x
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