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I have to design microwave signal generator using PLL. if there is an 10MHz clock in external ref pin ,the reference colck of PLL must use this external clock. If the power of clock signal in in external ref pin is below 1 dBm, the PLL must uses the internal 10MHz OCXO as reference clock...
There are many broadband RF mixer MMIC , But their datasheet always give characteristic under specific condition, typical a narrow band application. How to evaluate the performance under broadband condition? Or what margin should be when design broadband RF converting link?
For example ,IF a...
using pll as FSK modulator is easy to understand.how to use a PLL as PSK modulator? Anyone have suggestion?
I have read some article about using PLL as GMSK modulator by dlta-sigma modulator. changing the divider N could chang the frequency,but how could the N divider affect phase of VCO...
I have developed a program by matlab to calculate the mixer spur like abs(m*RF-n*LO). I take the RS spectrum analyzer as example, and find that the first IF 3476.4MHz does't show any difference with other IF as 3500MHz or 3450MHz .
Is that means the IF 3476.4MHz in RS SA is not the only choice?
hello,everyone.
I am now designing an wideband heterodyne receiver,sothe first IF should be high IF.I want to know what should be considered besides image rejection and half IF interference.
The spectrum analyzer in RS use 3476.4MHz as first IF,with 9kHz~3000MHz RF input.why is 3476.4MHz ...
I found that ADF4106 evaluation board using three 18 ohm resistors as power divider in pll at 5.6GHz.
Now I want to design a 8GHz synthesizer,could this circuits be used at 8GHz? Or I have to use a microwave power divider in microstrip?
Thanks!
Yes,another good idea,but it's a little complicated.
---------- Post added at 07:08 ---------- Previous post was at 06:49 ----------
Things is clear. First, during loop band width ,the phase noise is determined by PFD or OCXO. Second,If the PFD noise floor is higher than OCXO,higher PFD...
Thank you!
IN theory,higher PFD freq,lower phase noise in PLL.I know the multiplier N means 20logN degradation in phase noise.I have decide to use a low noise amplifier to amplifier the filter output.
Thanks!
My OCXO phase noise is as low as -155dBc/Hz@10kHz.should I use an OP or a low noise amplifier after the filter,which has a lower residual phase noise?
---------- Post added at 16:23 ---------- Previous post was at 16:21 ----------
But my OCXO is TTL output, not 50 ohm sine wave.
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