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Recent content by Er_SJSU

  1. E

    how to model PLL using MATLAB?

    Re: pll in matlab Hi, I am using your excel sheet to calculate loop parameters. Can you please let me know how to plot open loop response give in sheet 2?
  2. E

    Low Duty cycle generator

    Hi, I need pulse generator to Drive MOSFET. My requirements for duty cycle is Ton=1mS (5V,DC) and Toff=60 Sec (0V, DC). Can any one please suggest me the simplest possible solution to the problem. I am trying to avoid Timer and counter circuit. I want to use some kind of oscillator and...
  3. E

    PLL for GSM application divder Help

    The question is regarding my MS Project. I am designing PLL for GSM application using 45nm technology output frequey range is 890-915Mhz with 200khz channel spacing, so we will have 124 channels spaced at 200khz apart. The problem is for divider Nmin=890Mhz/200khz=4450 and...
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    Low Power Adaptive Blnking Logic Design Help

    Hello everyone, I want to design low power Adaptive Blanking Logic in CMOS 0.5um Technology.InputVsOutput relation is shwon in attachment. Input is Vcomp and Output will be blankig pulse of varing blanking time. for i/p greater than of equal to 3.2 V Circuit should provide constant blanking...
  5. E

    Adaptive Blnking Logic Design Help

    Hello everyone, I want to design Adaptive Blanking Logic in CMOS 0.5um Technology.InputVsOutput relation is shwon in attachment. Input is Vcomp and Output will be blankig pulse of varing blanking time. for i/p greater than of equal to 3.2 V Circuit should provide constant blanking of 3.5us and...
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    12V-5V Unregulated I/P to 3.3V,1A Regulated O/P

    Hello All, I want to design 12V-5V Unregulated I/P to 3.3V,1A Regulated O/P Linear Voltage Regulator using CMOS 0.6um Technology with Cadence tool. Can any one please suggest me correct Topology? I have knowledge of LDO but I am not sure for this problem LDO topogoly is suitable or what...
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