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Recent content by electrobuz

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    Error while buiilding in NiosII Eclipse EDS

    Hi, I am trying to run a simple hello world application by using New Nios II Application and BSP from template option in NiosII EDS. After selecting my sopcinfo file, choosing my sample project (hello world) when I click on build project to generate my elf file, I get the following error ...
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    Booting Linux on Nios II soft core on Stratix V FPGA

    I made the necessary kernel images (as per instructions on : http://www.rocketboards.org/foswiki/Documentation/NiosIILinuxUserManual#Building_U_45Boot) Now, when I try to nios2-download -g ~/linux-socfpga/vmlinux && nios2-terminal I get the following error : Using cable "DE5 Standard [2-1.7]"...
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    Error while debugging using system-console in Qsys

    I am trying to debug a design using Nios II on a Stratix V FPGA. When debugging with system-console, while trying to do a memory read, i get the following error : The RAM in my design doesn´t seem to work. How can I solve this?
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    [SOLVED] NIOS II on Altera Stratix V : Error while creating bsp

    I have made a design using the Nios II core in qsys. After compiling successfully, I proceed to Nios2EDS to create a new Nios II application and BSP from template. After selecting my .spocinfo file and clicking on finish, I get the following error : Does this mean my hardware design is...
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    Xilinx ISE on Macbook AIr

    Hi, I need to install Xilinx ISE / Vivado on my Macbook Air. However, I found out that Xilinx softwares are not compatible with Mac OS X. One possibility to accomplish this is to install ISE using a VM (or using bootcamp and installing windows on my mac), which i wanted to avoid due to low...
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    Finding Execution time of AVR C (Microcontroller) Code

    The Processor tab on the left side is always showing this (for any code): It does not show the run time? Maybe I am not simulating properly? Why is this happening?
  7. E

    Finding Execution time of AVR C (Microcontroller) Code

    I tried using AVR Studio simulator but could'nt figure out where I would see execution cycles and execution time on the simulator. Any resources where I can see where to spot these details?
  8. E

    Finding Execution time of AVR C (Microcontroller) Code

    Hey, I want to find the clock cycles or time in ms/us for execution of my code that I am running on an AVR Atmega 16. How do I go about finding it? Any help is appreciated.
  9. E

    [SOLVED] Synchronization error in UART

    The code had some minor issues. But mainly the DATA_RCVD flag was not being set properly hence all the problem. It is working now. Thank you Barry for being so 'patient' with me.
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    [SOLVED] Synchronization error in UART

    Oh yes. I made it 1 in case 1 when flag is 1 and data is loaded into a register. I am getting the following warning: "WARNING:Xst:1290 - Hierarchical block <FORFlag> is unconnected in block <UART>. It will be removed from the design. WARNING:Xst:1710 - FF/Latch <Q_t> (without init value) has a...
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    [SOLVED] Synchronization error in UART

    I am using a clocked process now. Also using register to store the value coming from the UART. Here is the code: C1: RX PORT MAP (CLOCK_50,UART_RXD,RX_DATA,RX_BUSY,DATA_RCVD); R1: reg PORT MAP (Input1,CLOCK_50,L_D1,Output1); R2: reg PORT MAP (Input2,CLOCK_50,L_D2,Output2); FORFlag:DFF PORT MAP...
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    Parallel Communication between FPGA

    I did read all the other posts. I am having problem understanding where do use this clocked process? I am making use of one clocked process to change the states. I understand that D1 and D2 are forming a combinatorial path and hence are not storing it. How does using a clocked process rectify this?
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    Parallel Communication between FPGA

    Yeah I had forgotten that I had commented it. The warning is gone now. But I am doing LED <= D1, still I cannot see anything on the LED's. They are not glowing. What could be the reason?
  14. E

    Parallel Communication between FPGA

    I want to send a byte from one fpga and catch it on another. I am using parallel communication for it. In the code below, I want first value being sent to be stored in D1 and the next in D2. architecture Behavioral of main1 is signal D1,D2,D3: std_logic_vector(6 downto 0); signal...
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    [SOLVED] Synchronization error in UART

    Precisely, this is what is happening. What I want is the first data that is sent, is stored in D1. Then the next one coming is stored in D2. How do I do this?
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