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Recent content by eeweiboy

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    How to determie the RES. and BJT type in Bandgap Circuits

    As title. BJT--> 5X5 or 10X10 , ? RES. -->with or without silicide ? which type is better --> N+ poly or P+ poly ?
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    Is digital error correction in 2-step ADC the same with pipelined ADC

    Is digital error correction in 2-step ADC the same with pipelined ADC ? I mean by shift 1/2 LSB can make it ?
  3. E

    About long-term jitter

    long term jitter Hi, I got problem of long-term jitter in my designed PLL(14.318MHz in, 25MHz out), the cycle-to-cycle jitter is about 200ps, however, long-term jitter is about 2.5ns. what's the main reason cause long-term jitter worse ? what can I do to improve long-term jitter ??
  4. E

    What's the meaning of V/I curves here?

    Could anyone know the meaning of this figure, which descriped in spec. document?
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    ESD Transistor: Why the pitch contacts of the Drain should..

    Re: ESD Transistor: Why the pitch contacts of the Drain shou The extended space have paracitic R, then makes the MOS more strong in ESD protection.
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    Ouput driving current simulation in IO design

    HI, Do anyone know how to do ouput driving current simulation in IO design ?? Can give us hspice examples ??
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    how many corner cases to sure the circuit being mass produce

    Re: how many corner cases to sure the circuit being mass pro some better FAB controll their process in TT corner
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    How to delete last 2 lines of netlist generated in Viewdraw?

    A problem about viewdraw Hi by using "VIEWDRAW" to generate nelist for Hspice simulation. it always generate ".OPTIONS INGOLD=2 CSDF=2 .END" on the bottom of generated netlists. :( I don't want these lines. How can I do ? Can it be setup somewhere ? BR Mike

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