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it will sure support 300V AC..but regarding the 20VAC lower voltage the primary inductance values to be achieved might be too low based on the power requirement at the output(also very low duty cycle).....
EA
Hi Goldsmith,
Thanks for the reply.
I have already designed one here.I just wanted to verify some of my designs.Just i was curious if thee is any spread sheet or some excel based free tool which i can use to validate or change.
Please someone let me know if something is vailable.
EA
Hi,
I have a 60W transformer design i made for a Viper100 based design.
Anyone has come across any reliable Flyback transformer spread sheet which i can use to validate my transformer calculation.
Please share me the same if possible.
EA
this might help.....
page number 8.....
http://www.analog.com/static/imported-files/application_notes/AN-1120.pdf
http://cds.linear.com/docs/en/application-note/an83f.pdf
EA
i could find some interesting articles related to this in microchip using PIC...the code density looks like very small......
https://ww1.microchip.com/downloads/en/AppNotes/01384A.pdf
https://ww1.microchip.com/downloads/en/AppNotes/01467A.pdf...
The resistors used for the output voltage feedback will basically act as a bleeder.I think you can tune those resistor values to get a better discharge characteristics.
Regards
EA
the N-channel upper mosfets requires a bootstrap circuitry to effectively drive the MOSFETs.......the RDSon of N-MOS is very less compared to P-MOS......
EA
i just have a feeling that the capacitor 22uF used will charge to 30V when the LED is switched off and once the Darlington is turned on (almost fully) the current flowing through the Transistor would be (without the current control through the base) (30V-2.5(led forward voltage)-0.5(approx drop...
one possibility is if the inductor saturation current is 1A for me this design looks on the edge.....
for example for 22V,.23A the output power is 5.06W, and for which the IC internal switch will try to draw 1A current from 5V to achieve the same(power 5.06W or above considering the losses)...
my understanding is this ramp up current requirement is not for the configuration...its for the initialization FPGA which you have to make sure to avoid any erroneous behaviour.....
you can relate it to surge current in a capacitor......its something like charging up the internal mosfets(or the...
the N-channel MOSFET is driven by 12V derived from U1 which looks fine.....please provide a discharge path during turned off condition for the Cgs of the MOSFET by providing a Pull down resistor or any active control which might help.......
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