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Re: how to deal with the bist_clock for the mbist?
As I know, set_dft_config -mbist ;insert_dft and setup the test model, the DC can insert the mbist for us.
Is the Dc support the output of the PLL as the mbist clock, if I want to combine the mbist with the JTAG, I
should setup the bist_clock(high speed) and bist_clock_lu(connect with JTAG TAP).
I have 2 problem.
1. can the PLL output clock act as the bist_clock?
2.why the bist_clock should be the...
I use the dc_shell-t on the rhel3 os of the PC , the keyboard is PC104 with 3 windows keys, but when I enter the delete or backspace and the other keys, the dc_shell-t dispaly the strange chars, I can not control the input chars, like below. anyone can tell me how to correctly configure it...
Re: VCS, NC-Verilog and Modelsim, which is the best simulato
VCS/NCV is very fast and simple for verilog simulation, the modelsim is suit to the VHDL, and the usually VCS is at least equal to the NCV at the speed, the modlesim is much more slow for verilog
memory floorplan
I have a chip require to place the 12 memory macro, one inisist place all of the memeory together and only the routing channel is reserved between the memory. But I think that the more space should be given to place some stdcells for meet the timing constraint. if only the...
celtic knowhow
I install the soc encounter 4.1 on the rhel4, and ad the ./soc/bin to the path and the oc/share/celtic/scripts to the path. I can run the enconter command, and the celtic, but when i run the celtic_ndc, the error is issue. I search the cdsdoc and can not find the results. below...
Re: can VCS run on the platform of REDHAT linux advanced ser
but i faile with the vcs7.2 on the rhel as 3. It complained the "ctype_b" error. who can tell me how to install the vcs 7.2 on the thel as 3.
synopsys design compiler db
link library for cell instance in the verilog design, target for infer (synthesis) cell for std cell library and the other library. for example, u have a memory called SRAM4k which generated by the memory complier, u have the corresponding library sram4k.db, u should...
redhat7.2 is a current main platform for eda tools, rh8.0 can also work well, then at the next year, the rh as3.0 would become the main platform.]
this is the annocement of industry
**broken link removed**
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