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Thanks a lot. From your explanation I get a lot.
But I also doubt how to decide the hysteresis voltage in comparator? Should I use simulation to determine hysteresis voltage or through hand calculatioin?
In my system, a digital PFD(phase/frequency detector) is following behind the comparator...
I doubt at what condition should I use hysteresis comparator. Is hsysteresis compulsory?
Now I use comparator to convert two anti-phase sin. waves from sensor readout circuits to a square-wave.
The sin. waves are with about 100-150mV peak-to-peak voltage and 8kHz frequency.
If I use a...
Thank you!
I got it.
Added after 3 minutes:
The 'subtractor' is refered to the left common source circuit which is the output of amp.
This name is from a paper of TI's engineer.
Thank you.
I think my circuit will have bigger PSRR becasue of the cascode current mirror and another voltage subtractor.
Can you tell me which paper does your circuit from?
I am a little curious about the third terminal of the opa in your circuit.
Added after 1 minutes:
Thank you!
I will...
Thank you, sengyee88.
What you analysis is really right.
Do you mind look at another topic of mine about the opa in the bandgap?
That is "What is the usage of the PMOS FET in this simple amplifier?" by me.
Who can help me the analysis this circuit?
VDD＝3V and 'I50A' should be 50uA
1.How about the current "I50A" in this bandgap circuit?
Is it PTAT current or temperature-independent?
I think it is PTAT but I was told that it work as a bandgap current source in a ADC circuit.
2.How about the...
Who can help me the analysis this bandgap circuit?
1.How about the current "I50A" in this bandgap circuit?
Is it PTAT current or temperature-independent?
I think it is PTAT but I was told that it work as a bandgap current source in a ADC circuit.
2.How about the voltage "Vm" in the middle of...
This is a simple amplifier in a typical bandgap circuit.
Who can tell me why there is a PMOS FET "ST1" in the middle of the circuit?
what is the useage of it?
Thanks!
This is a simple amplifier in a typical bandgap circuit.
Who can tell me why there is a PMOS FET "ST1" in the middle of the circuit?
what is the useage of it?
Thanks!
variable capacitor pspice
I want to use the components from the analogLib in Cadence to build a equivalent circuit as the paper describes.
But I don't know how to use the dependent sources. This really need a good advice.
variable capacitor spice model
I want to generate a variable capacitor in cadence such as the Cs in figure below.
Cs is changing its capacitive value in a frequncy of 1kHz.
I try making a Cs using VerilogA language. But this can only generate varible current.
I have found a paper about...
Re: How to generate a variable capacitor in cadence?
Thank for Hughes's and sengyee88's help.
But except that measure can I implement variable cap. in other easy way?
I want to generate a variable capacitor in cadence such as the Cs in figure below.
Cs is changing its capacitive value in a frequncy of 1kHz.
I try making a Cs using VerilogA language. But this can only generate varible current.
I really wonder how to generate a real varable capacitor, which is...
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