Continue to Site

Welcome to EDAboard.com

Welcome to our site! EDAboard.com is an international Electronics Discussion Forum focused on EDA software, circuits, schematics, books, theory, papers, asic, pld, 8051, DSP, Network, RF, Analog Design, PCB, Service Manuals... and a whole lot more! To participate you need to register. Registration is free. Click here to register now.

Recent content by cswang

  1. C

    Ft vs. operating freq in RF design

    maximum avalible gain is more important than ft in really high frequency RF design(such as 60GHz)
  2. C

    current starved inverter

    current starved oscillator What's your operated frequency? The device size will introduce the paracitic cap, and will degrade yout speed.
  3. C

    Question about VCO in a real circuit

    Re: VCO question 1.internal phase could be happen in any phase , depond on your initial start-up phase, but it is not very important 2.VCO output, it is a sine, or pulse wave naturelly.
  4. C

    unidentified transistor....please help

    1815 transistor How about 1AMN and AP17 this two transistor ? Could someone give me the manufactor name and part number ? Thanks
  5. C

    Anyone Who Can Help Me To Give A Example Of LNA or PA?

    Your design is on single chip or lump element ? That's a totly different design methodology!
  6. C

    RF options for HSPICE?

    I don't understand , you mean that input file format change ? or just not compatible with your design enverment ? I am familiar with HSPICE , maybe i will feel free :o
  7. C

    RF options for HSPICE?

    cosmosse Why ? Could you tell us your experment ?
  8. C

    how to use the "encrypt" in hspice?

    de-encrypting hspice model That function only hide your text between them in .lis file .... I always use that to make my .list file more shorter , clear and readable!
  9. C

    How to simualte CMOS spiral inductor ?

    I know that , but in my experement , to estimate inductor is not't hard , but Q is really difficult! Each tool will get different Q value and also different from our measurement data ! any idea ? thanks!
  10. C

    How to simualte CMOS spiral inductor ?

    Hi ! Anyone know which EM tool can precisely predict CMOS spiral inductor Q and model ? Where can find the example or document ?
  11. C

    Does anyone know SiGe layout article or ebook?

    Yes , it is the same as analog or RF IC layout ! you can reference the art of analog layout e-book in **broken link removed**
  12. C

    Using VNA for RF impedance and phase measurement

    How to use VNA to measure differential CKT impedence ? :?:
  13. C

    How to maintain NF? reducing the signal power...

    Re: re: How to maintain NF? You could design high gain and low gain two mode to reduce your design! "A CMOS Cellular Receiver Front-Ends from specification to relization " wroted by Michiel Steyaert is a good book for this topic!
  14. C

    Could somebody explain Analog IC Design Flow?

    I agree you ! Because analog model can only descript 1 ~ 3 order behavior , a lot of non-linear item is hard to model !
  15. C

    Looking for RF IC for U-NII band transceiver

    Dose anyone has 802.11a vender's chipshet datasheet?(Like Atheros ? Intersil ? RFMD ? or envara?) Could you pm to me Thanks!

Part and Inventory Search

Back
Top