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Recent content by ckaven

  1. C

    [SOLVED] Help 3.3V logic controlled switch that has negative output voltages

    Hello, I have an elementary electronics question. I have attached a circuit i need help solving. V1=5V and V2= -30V. what i need is to be able to control the switch with 3.3V logic. Vcntrl(0V)=off ---Vout=-30V; Vcntrl(3.3V)=on ---Vout= -27V. I dont care what type of device is used as the switch...
  2. C

    [MOVED]Layout Considerations to reduce 1/f noise

    I dont believe that thermal noise is the dominate issue. The pcb is sitting on a bare hard surface in a room that averages about 20C. There is also very little heat produced during operation due to the fact that the entire circuit only draws a max of 200uA. I plan to do spectral analysis of...
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    [MOVED]Layout Considerations to reduce 1/f noise

    A coworker suggested that i change my bypass and bulk capacitors. He claims that he has seen cases were using ceramics with too low of esr can increase 1/f noise. Have either of you ever heard of that happening?
  4. C

    [MOVED]Layout Considerations to reduce 1/f noise

    Thanks biff and dave. I have notice the effects of thermal noise on the board. All feedback resistors in the design are 1M. If i change them to 10k the noise in the low region improves by a couple dB, but it also increases the power draw to an unacceptable level. biff44- I havent seen guard...
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    [MOVED]Layout Considerations to reduce 1/f noise

    application is low frequency analog. range of interest .01-1000Hz. problem is a rise in noise floor below 10Hz
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    [MOVED]Layout Considerations to reduce 1/f noise

    Hello, I am relatively new to PCB layout. I was wondering if anyone on here has any considerations or do's and donts to reduce 1/f noise in an analog circuit. I cant change the ICs being used due to power and customer restraints, so the noise generated by them is what it is. I was wondering if...

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