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Recent content by CHIPMUNK_kevin

  1. C

    Does anybody try use HS nldmos as LS nldmos for your BUCK converter design?

    Thanks dick_freebird. In our project , we usually use isolated LS nldmos for our project .This is because isolated LS could reduce the substrate noise greatly during dead time , especially for large load current application ,for example >5A, isolated is a must .By now , I know some company use...
  2. C

    Does anybody try use HS nldmos as LS nldmos for your BUCK converter design?

    Hello ， For BUCK converter design ，does anybody use isolated high side nldmos as isolated low side nldmos ？ If this works ？ Thnaks in advance .
  3. C

    How to select nldmos for BUCK conveter

    Hello ， Does anybody know how to select nldmos for your BUCK converter based on BVDSS/eSOA /CHC ? For example , if design a 17V BUCK converter , there will be 16V/18V/20V nldmos could be used ,and their Rsp and BVDSS are different ,so if I select 20V nldmos , it will be more robust for my...
  4. C

    Help with VerilogA in Cadence

    Hello, I was trying to use verilogA to write a model file and simulate it in Virtuoso Cadence. When I try to simulate i get following error Missing or corrupt .oa file in cellview 'memristordesign/memristor/spectre cmos_sch cmos.sch schematic veriloga'. The OSS netlister can only process...
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