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Hello i need initialize sdram that was interface with xilinx fpga using .xes or .hex file.
is it possible in vhdl?
is it possible in xilinx ise?
any other possibilities?
I want to read the PID,VID values from EEPROM that was used in the xilinx spartan-3E starter kit ,is there any utilitiesavailable to read that.
or how i can write that values in EEPROM on my programing cable .
Hi friends i have write the vhdl code for sdram in that i have write the array of data in the data bus during each clock bus but when i read the data from sdram i get the last byte of the array during the all the read cycles.
Can i know in which you are currently implementing (i.e) in VLSI or any other platform.
Becoz i am also involving in the design of USB 3.0 in fpga and have the knowledge abot the usb2.0 .
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