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Recent content by bobxing

  1. B

    Simulink Problem while simulating ADC

    You can include an ideal DAC to check the difference in deriving INL/DNL
  2. B

    Reference papers about LVDS cmos driver

    LVDS cmos driver which paper on the website of ee department of Texas A&M university?
  3. B

    help me, about LVDS's thesis

    I think boni's paper is great
  4. B

    Does anyone has simulation template for characterizing LDO?

    LDO simulation help thanks a lot. Does the transient step response simulation also a way to evaluate the stability?
  5. B

    What is the difference b/w VOD and VDSAT?

    hspice vod You give me a good clue. Thanks I studied the simulated list file. Vgs-vth=vod, But Vds-vdsat <> Vod! so how come? the vdsat?
  6. B

    What is the difference b/w VOD and VDSAT?

    vdsat In hspice2005.9 and later, for a simple mos transistor simulation, the op has the calculation of vod=.. and vdsat=.. they might be considerably different. Anyone can tell their difference? Thanks in advance. Bobxing
  7. B

    analog DLL stability issues

    DLL stability I agree, but simple current-starved inverter delay line will make the phase noise of the input clk to be worse, isn't it?
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    We are all from China

    From China Why does eda board setup this special forum for CHina? Because so many Chinese on EDABoard?
  9. B

    Mix Analog and Digital design verification??

    If I have verilog code for digital part and Verilog code for analog part, what is the easiest tool for co-simulation? thanks
  10. B

    How much is the cross-axis sensitivity for Hall effect senso

    They have different measure ranges (For Weak and strong Magnetic field)
  11. B

    help about C++ builder!

    bordbk61.dll is missing o not registered I meet the same problem, I used the defult installation. When I use regsvr32 bordbk61.dll , it says cannot register, no help file. ps. I use 64-bit CPU, is that the reason? Will newer builder C software work?
  12. B

    ESD Circuit Simulation Problem

    Hi! An ESD circuit must withstand 2kV of ESD using the human body model and 500V using the charged device model without damage. I wonder How can I simulate the ESD circuit to see if it works? Can Hspice simulation work? Thanks
  13. B

    What are the differences in attached VCOs

    Questions about VCO no difference. 8 phases
  14. B

    re: charge pump design

    re: charge pump design thank you very much Added after 1 minutes: I think what trouble me most is the matching of the PMOS source and NMOS sink.
  15. B

    relationship of bandwidth of CMFB and signal loop

    WHAT ABOUT LOOP GAIN? When stability is guranteed, loop gain the big,the better?
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