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Recent content by blimp

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    How to interface PCI-E to Flash and DDR memory

    Hi, Anyone has experienced interface PCI-E to Flash and DDR memory?
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    What is the meaning of the cross clock domain?

    What is meaning of the corss clock domain?
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    How to make BFM in a testbench ?

    Hi, Who did experience how to make a BFM based on MPC 8260 in a testbench? In that case, I do not know how to make the BFM of MPC 8260 , so anyone does help me?
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    how to port cpld codes to fpga

    Is there a big difference bewteen cpld codes and fpga codes?
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    Timing Simulation problem

    Hi, I meet critical problems during the timing simulation after back-anotation. Functional simulation is ok but when trying to do the timing simulation on Modelsim, most of the signals on Modesim are red colours I can see. Who knows or experieces this? Although I try to solve this problem, I...
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    How to get rid of gated clocks in a code

    Hi, I face the gated clock's problem even though i use the synplify's option helping get rid of the clock. After place and route in Xilinx, the tool shows there are several gated clocks. I think the option does not work.
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    How to get rid of gated clocks in a code

    Hi, Who knows how to remove gated clocks in a code?
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    AAL2 and AAL5 - looking for reference

    AAL2 and AAL5 Hi, I am looking for the reference deisng of AAL2 and AAL5, so does anyone have experience in them?
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    Communication controller - rar file to download

    Communication controller Communication controller IP core

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